// If we have RTTI, we can make this assert report the correct type. No RTTI, though, when
// built with .NET Core, especially when built against the PAL.
- AssertCodeMsg((ptr - rawData) == size, EXCEPTIONCODE_LWM, "%s - Ended with unexpected sizes %Ix != %x",
+ AssertCodeMsg((unsigned int)(ptr - rawData) == size, EXCEPTIONCODE_LWM, "%s - Ended with unexpected sizes %Ix != %x",
"Unknown type" /*typeid(_Item).name()*/, ptr - rawData, size);
}
ptr += bufferLength * sizeof(unsigned char);
}
- AssertCodeMsg((ptr - rawData) == size, EXCEPTIONCODE_LWM, "Ended with unexpected sizes %Ix != %x",
+ AssertCodeMsg((unsigned int)(ptr - rawData) == size, EXCEPTIONCODE_LWM, "Ended with unexpected sizes %Ix != %x",
ptr - rawData, size);
}
delete[] tItems;
}
- AssertCodeMsg((ptr - rawData) == size, EXCEPTIONCODE_LWM, "Ended with unexpected sizes %Ix != %x",
+ AssertCodeMsg((unsigned int)(ptr - rawData) == size, EXCEPTIONCODE_LWM, "Ended with unexpected sizes %Ix != %x",
ptr - rawData, size);
}
for (const MemoryRegion& image : m_crashInfo.ModuleMappings())
{
- struct NTFileEntry entry { image.StartAddress(), image.EndAddress(), image.Offset() / pageSize };
+ struct NTFileEntry entry { (unsigned long)image.StartAddress(), (unsigned long)image.EndAddress(), (unsigned long)(image.Offset() / pageSize) };
if (!WriteData(&entry, sizeof(entry))) {
return false;
}
#ifdef FEATURE_64BIT_ALIGNMENT
// checks if the type requires 8-byte alignment.
// this is not exposed via ICorDebug at present.
- HRESULT CordbType::RequiresAlign8(BOOL* isRequired);
+ HRESULT RequiresAlign8(BOOL* isRequired);
#endif
//-----------------------------------------------------------
// *** should never get here ***
EMIT_BREAKPOINT
-NESTED_END ExceptionHijackEnd, _TEXT
+NESTED_END_MARKED ExceptionHijack, _TEXT
while (x < plug_end)
{
- if (check_short_obj_p && ((plug_end - x) < (DWORD)min_pre_pin_obj_size))
+ if (check_short_obj_p && ((DWORD)(plug_end - x) < (DWORD)min_pre_pin_obj_size))
{
dprintf (3, ("last obj %Ix is short", x));
endif(NOT CMAKE_SYSTEM_NAME STREQUAL Darwin)
if(PAL_CMAKE_PLATFORM_ARCH_ARM)
- set_source_files_properties(exception/seh.cpp PROPERTIES COMPILE_FLAGS -Wno-error=inline-asm)
+ if (CMAKE_CXX_COMPILER_ID MATCHES "Clang")
+ set_source_files_properties(exception/seh.cpp PROPERTIES COMPILE_FLAGS -Wno-error=inline-asm)
+ endif()
endif(PAL_CMAKE_PLATFORM_ARCH_ARM)
set(SOURCES
if(CLR_CMAKE_PLATFORM_ARCH_ARM)
# Ensure that the remote and local unwind code can reside in the same binary without name clashing
add_definitions("-Darm_search_unwind_table=UNW_OBJ(arm_search_unwind_table)")
- # Disable warning in asm: use of SP or PC in the list is deprecated
- add_compile_options(-Wno-inline-asm)
if (CMAKE_CXX_COMPILER_ID MATCHES "Clang")
# Disable warning due to labs function called on unsigned argument
add_compile_options(-Wno-absolute-value)
+ # Disable warning in asm: use of SP or PC in the list is deprecated
+ add_compile_options(-Wno-inline-asm)
endif()
# Disable warning for a bug in the libunwind source src/arm/Gtrace.c:529, but not in code that we exercise
add_compile_options(-Wno-implicit-function-declaration)
UINT16 FpscrOffset;
} ARM_CONTEXT_OFFSETS, *PARM_CONTEXT_OFFSETS;
+const UINT16 OFFSET_NONE = (UINT16)~0;
+
static const ARM_CONTEXT_OFFSETS TrapFrameOffsets =
-{ 8, 272, { 248,252,256,260, ~0, ~0, ~0, ~0, ~0, ~0, ~0, ~0, 72 },
- { 184, 192, 200, 208, 216, 224, 232, 240, ~0, ~0, ~0, ~0, ~0, ~0, ~0, ~0, ~0,
- ~0, ~0, ~0, ~0, ~0, ~0, ~0, ~0, ~0, ~0, ~0, ~0, ~0, ~0, ~0}, 64, 68, 264,
+{ 8, 272, { 248,252,256,260, OFFSET_NONE, OFFSET_NONE, OFFSET_NONE, OFFSET_NONE, OFFSET_NONE, OFFSET_NONE, OFFSET_NONE, OFFSET_NONE, 72 },
+ { 184, 192, 200, 208, 216, 224, 232, 240, OFFSET_NONE, OFFSET_NONE, OFFSET_NONE, OFFSET_NONE, OFFSET_NONE, OFFSET_NONE, OFFSET_NONE, OFFSET_NONE, OFFSET_NONE,
+ OFFSET_NONE, OFFSET_NONE, OFFSET_NONE, OFFSET_NONE, OFFSET_NONE, OFFSET_NONE, OFFSET_NONE, OFFSET_NONE, OFFSET_NONE, OFFSET_NONE, OFFSET_NONE, OFFSET_NONE, OFFSET_NONE, OFFSET_NONE, OFFSET_NONE}, 64, 68, 264,
268, 176};
static const ARM_CONTEXT_OFFSETS MachineFrameOffsets =
-{ 8, 8, { ~0, ~0, ~0, ~0, ~0, ~0, ~0, ~0, ~0, ~0, ~0, ~0, ~0 },
- {~0, ~0, ~0, ~0, ~0, ~0, ~0, ~0, ~0, ~0, ~0, ~0, ~0, ~0, ~0, ~0, ~0, ~0, ~0,
- ~0, ~0, ~0, ~0, ~0, ~0, ~0, ~0, ~0, ~0, ~0, ~0, ~0}, 0, ~0, 4, ~0 , ~0};
+{ 8, 8, { OFFSET_NONE, OFFSET_NONE, OFFSET_NONE, OFFSET_NONE, OFFSET_NONE, OFFSET_NONE, OFFSET_NONE, OFFSET_NONE, OFFSET_NONE, OFFSET_NONE, OFFSET_NONE, OFFSET_NONE, OFFSET_NONE },
+ {OFFSET_NONE, OFFSET_NONE, OFFSET_NONE, OFFSET_NONE, OFFSET_NONE, OFFSET_NONE, OFFSET_NONE, OFFSET_NONE, OFFSET_NONE, OFFSET_NONE, OFFSET_NONE, OFFSET_NONE, OFFSET_NONE, OFFSET_NONE, OFFSET_NONE, OFFSET_NONE, OFFSET_NONE, OFFSET_NONE, OFFSET_NONE,
+ OFFSET_NONE, OFFSET_NONE, OFFSET_NONE, OFFSET_NONE, OFFSET_NONE, OFFSET_NONE, OFFSET_NONE, OFFSET_NONE, OFFSET_NONE, OFFSET_NONE, OFFSET_NONE, OFFSET_NONE, OFFSET_NONE}, 0, OFFSET_NONE, 4, OFFSET_NONE , OFFSET_NONE};
static const ARM_CONTEXT_OFFSETS ContextOffsets =
{ 16, 416, { 4, 8, 12, 16, 20, 24, 28, 32, 36, 40, 44, 48, 52 },
}
for (RegIndex = 0; RegIndex < 13; RegIndex++) {
- if (Offsets->RegOffset[RegIndex] != (UINT16)~0) {
+ if (Offsets->RegOffset[RegIndex] != OFFSET_NONE) {
SourceAddress = ContextRecord->Sp + Offsets->RegOffset[RegIndex];
UPDATE_CONTEXT_POINTERS(UnwindParams, RegIndex, SourceAddress);
CONTEXT_REGISTER(ContextRecord, RegIndex) =
}
for (RegIndex = 0; RegIndex < 32; RegIndex++) {
- if (Offsets->FpRegOffset[RegIndex] != (UINT16)~0) {
+ if (Offsets->FpRegOffset[RegIndex] != OFFSET_NONE) {
SourceAddress = ContextRecord->Sp + Offsets->FpRegOffset[RegIndex];
UPDATE_FP_CONTEXT_POINTERS(UnwindParams, RegIndex, SourceAddress);
ContextRecord->D[RegIndex] = MEMORY_READ_QWORD(UnwindParams, SourceAddress);
// Link register and PC next
//
- if (Offsets->LrOffset != (UINT16)~0) {
+ if (Offsets->LrOffset != OFFSET_NONE) {
SourceAddress = ContextRecord->Sp + Offsets->LrOffset;
ContextRecord->Lr = MEMORY_READ_DWORD(UnwindParams, SourceAddress);
}
- if (Offsets->PcOffset != (UINT16)~0) {
+ if (Offsets->PcOffset != OFFSET_NONE) {
SourceAddress = ContextRecord->Sp + Offsets->PcOffset;
ContextRecord->Pc = MEMORY_READ_DWORD(UnwindParams, SourceAddress);
// Finally the stack pointer
//
- if (Offsets->SpOffset != (UINT16)~0) {
+ if (Offsets->SpOffset != OFFSET_NONE) {
SourceAddress = ContextRecord->Sp + Offsets->SpOffset;
ContextRecord->Sp = MEMORY_READ_DWORD(UnwindParams, SourceAddress);
} else {
LOCAL_LABEL(AssigningNull):
// Assigning null doesn't need write barrier
- adds r0, r1, LSL #2 // r0 = r0 + (r1 x 4) = array->m_array[idx]
+ adds r0, r0, r1, LSL #2 // r0 = r0 + (r1 x 4) = array->m_array[idx]
str r2, [r0, #PtrArray__m_Array] // array->m_array[idx] = val
bx lr
// Setup args for JIT_WriteBarrier. r0 = &array->m_array[idx]// r1 = val
adds r0, #PtrArray__m_Array // r0 = &array->m_array
- adds r0, r1, LSL #2
+ adds r0, r0, r1, LSL #2
mov r1, r2 // r1 = val
// Branch to the write barrier (which is already correctly overwritten with
NESTED_END \__PInvokeGenStubFuncName, _TEXT
-.endmacro
+.endm
// ------------------------------------------------------------------
// IN:
str lr, [r4, #InlinedCallFrame__m_pCallerReturnAddress]
str r9, [r4, #InlinedCallFrame__m_pSPAfterProlog]
- ;; r0 = GetThread()
+ // r0 = GetThread()
bl C_FUNC(GetThread)
str r0, [r4, #InlinedCallFrame__m_pThread]
// instruction halfword to which it applies. For thumb-2 encodings the offset must be computed before emitting
// the first of the halfwords.
#undef PC_REL_OFFSET
-#define PC_REL_OFFSET(_field) (WORD)(offsetof(DispatchStub, _field) - (offsetof(DispatchStub, _entryPoint[n + 2]) & 0xfffffffc))
+#define PC_REL_OFFSET(_field) (WORD)(offsetof(DispatchStub, _field) - ((offsetof(DispatchStub, _entryPoint) + sizeof(*DispatchStub::_entryPoint) * (n + 2)) & 0xfffffffc))
// r0 : object. It can be null as well.
// when it is null the code causes an AV. This AV is seen by the VM's personality routine
// instruction halfword to which it applies. For thumb-2 encodings the offset must be computed before emitting
// the first of the halfwords.
#undef PC_REL_OFFSET
-#define PC_REL_OFFSET(_field) (WORD)(offsetof(ResolveStub, _field) - (offsetof(ResolveStub, _resolveEntryPoint[n + 2]) & 0xfffffffc))
+#define PC_REL_OFFSET(_field) (WORD)(offsetof(ResolveStub, _field) - ((offsetof(ResolveStub, _resolveEntryPoint) + sizeof(*ResolveStub::_resolveEntryPoint) * (n + 2)) & 0xfffffffc))
// ldr r12, [r0 + #Object.m_pMethTab]
_stub._resolveEntryPoint[n++] = RESOLVE_STUB_FIRST_WORD;
_ASSERTE((n & 1) == 0);
#undef PC_REL_OFFSET
-#define PC_REL_OFFSET(_field) (WORD)(offsetof(ResolveStub, _field) - (offsetof(ResolveStub, _slowEntryPoint[n + 2]) & 0xfffffffc))
+#define PC_REL_OFFSET(_field) (WORD)(offsetof(ResolveStub, _field) - ((offsetof(ResolveStub, _slowEntryPoint) + sizeof(*ResolveStub::_slowEntryPoint) * (n + 2)) & 0xfffffffc))
n = 0;
_ASSERTE((n & 1) == 0);
#undef PC_REL_OFFSET
-#define PC_REL_OFFSET(_field) (WORD)(offsetof(ResolveStub, _field) - (offsetof(ResolveStub, _failEntryPoint[n + 2]) & 0xfffffffc))
+#define PC_REL_OFFSET(_field) (WORD)(offsetof(ResolveStub, _field) - ((offsetof(ResolveStub, _failEntryPoint) + sizeof(*ResolveStub::_failEntryPoint) * (n + 2)) & 0xfffffffc))
n = 0;
// resolveEntryPoint:
// b _resolveEntryPoint
- offset = (WORD)(offsetof(ResolveStub, _resolveEntryPoint) - offsetof(ResolveStub, _failEntryPoint[n + 2]));
+ offset = (WORD)(offsetof(ResolveStub, _resolveEntryPoint) - (offsetof(ResolveStub, _failEntryPoint) + sizeof(*ResolveStub::_failEntryPoint) * (n + 2)));
_ASSERTE((offset & 1) == 0);
offset = (offset >> 1) & 0x07ff;
_stub._failEntryPoint[n++] = 0xe000 | offset;
// Save argument registers around the GetThread call. Don't bother with using ldm/stm since this inefficient path anyway.
for (int reg = 0; reg < 4; reg++)
- psl->ThumbEmitStoreRegIndirect(ThumbReg(reg), thumbRegSp, offsetof(ArgumentRegisters, r[reg]));
+ psl->ThumbEmitStoreRegIndirect(ThumbReg(reg), thumbRegSp, offsetof(ArgumentRegisters, r) + sizeof(*ArgumentRegisters::r) * reg);
#endif
psl->ThumbEmitGetThread(regThread);
#ifdef FEATURE_PAL
for (int reg = 0; reg < 4; reg++)
- psl->ThumbEmitLoadRegIndirect(ThumbReg(reg), thumbRegSp, offsetof(ArgumentRegisters, r[reg]));
+ psl->ThumbEmitLoadRegIndirect(ThumbReg(reg), thumbRegSp, offsetof(ArgumentRegisters, r) + sizeof(*ArgumentRegisters::r) * reg);
#endif
// mov [regFrame + FrameInfo.offsetOfGSCookie], GetProcessGSCookie()
// 1) First loop will emit the moves that have stack location as the target
// 2) Second loop will emit moves that have register as the target.
DWORD idxCurrentLoopBegin = 0, idxCurrentLoopEnd = cArgDescriptors;
- if (idxFirstMoveToStack != -1)
+ if (idxFirstMoveToStack != (DWORD)-1)
{
_ASSERTE(idxFirstMoveToStack < cArgDescriptors);
idxCurrentLoopBegin = idxFirstMoveToStack;
// reload argument registers that could have been corrupted by the call
for (int reg = 0; reg < 4; reg++)
ThumbEmitLoadRegIndirect(ThumbReg(reg), ThumbReg(4),
- offsetOfTransitionBlock + TransitionBlock::GetOffsetOfArgumentRegisters() + offsetof(ArgumentRegisters, r[reg]));
+ offsetOfTransitionBlock + TransitionBlock::GetOffsetOfArgumentRegisters() + offsetof(ArgumentRegisters, r) + sizeof(*ArgumentRegisters::r) * reg);
#endif
ThumbEmitLoadRegIndirect(ThumbReg(6), ThumbReg(5), Thread::GetOffsetOfCurrentFrame());
return 6 + indirectionsSize + 4;
}
- static VTableCallHolder* VTableCallHolder::FromVTableCallEntry(PCODE entry)
+ static VTableCallHolder* FromVTableCallEntry(PCODE entry)
{
LIMITED_METHOD_CONTRACT;
return (VTableCallHolder*)(entry & ~THUMB_CODE);
static int AlignOf(PrecodeType t)
{
SUPPORTS_DAC;
- int align = PRECODE_ALIGNMENT;
+ unsigned int align = PRECODE_ALIGNMENT;
#if defined(_TARGET_X86_) && defined(HAS_FIXUP_PRECODE)
// Fixup precodes has to be aligned to allow atomic patching