drm/i915/gvt: Constify gvt_mmio_block
authorRikard Falkeborn <rikard.falkeborn@gmail.com>
Sat, 4 Dec 2021 10:55:23 +0000 (11:55 +0100)
committerZhi Wang <zhi.a.wang@intel.com>
Wed, 12 Jan 2022 07:52:37 +0000 (02:52 -0500)
These are never modified, so make them const to allow the compiler to
put it in read-only memory.

Signed-off-by: Rikard Falkeborn <rikard.falkeborn@gmail.com>
Signed-off-by: Zhi Wang <zhi.a.wang@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/20211204105527.15741-6-rikard.falkeborn@gmail.com
Reviewed-by: Zhi Wang <zhi.a.wang@intel.com>
drivers/gpu/drm/i915/gvt/gvt.h
drivers/gpu/drm/i915/gvt/handlers.c

index 0c06156..0ebffc3 100644 (file)
@@ -272,7 +272,7 @@ struct intel_gvt_mmio {
 /* Value of command write of this reg needs to be patched */
 #define F_CMD_WRITE_PATCH      (1 << 8)
 
-       struct gvt_mmio_block *mmio_block;
+       const struct gvt_mmio_block *mmio_block;
        unsigned int num_mmio_block;
 
        DECLARE_HASHTABLE(mmio_info_table, INTEL_GVT_MMIO_HASH_BITS);
index 805fee4..3cefaf5 100644 (file)
@@ -3628,11 +3628,11 @@ static int init_bxt_mmio_info(struct intel_gvt *gvt)
        return 0;
 }
 
-static struct gvt_mmio_block *find_mmio_block(struct intel_gvt *gvt,
-                                             unsigned int offset)
+static const struct gvt_mmio_block *find_mmio_block(struct intel_gvt *gvt,
+                                                   unsigned int offset)
 {
        unsigned long device = intel_gvt_get_device_type(gvt);
-       struct gvt_mmio_block *block = gvt->mmio.mmio_block;
+       const struct gvt_mmio_block *block = gvt->mmio.mmio_block;
        int num = gvt->mmio.num_mmio_block;
        int i;
 
@@ -3671,7 +3671,7 @@ void intel_gvt_clean_mmio_info(struct intel_gvt *gvt)
  * accessible (should have no F_CMD_ACCESS flag).
  * otherwise, need to update cmd_reg_handler in cmd_parser.c
  */
-static struct gvt_mmio_block mmio_blocks[] = {
+static const struct gvt_mmio_block mmio_blocks[] = {
        {D_SKL_PLUS, _MMIO(DMC_MMIO_START_RANGE), 0x3000, NULL, NULL},
        {D_ALL, _MMIO(MCHBAR_MIRROR_BASE_SNB), 0x40000, NULL, NULL},
        {D_ALL, _MMIO(VGT_PVINFO_PAGE), VGT_PVINFO_SIZE,
@@ -3754,7 +3754,7 @@ int intel_gvt_for_each_tracked_mmio(struct intel_gvt *gvt,
        int (*handler)(struct intel_gvt *gvt, u32 offset, void *data),
        void *data)
 {
-       struct gvt_mmio_block *block = gvt->mmio.mmio_block;
+       const struct gvt_mmio_block *block = gvt->mmio.mmio_block;
        struct intel_gvt_mmio_info *e;
        int i, j, ret;
 
@@ -3872,7 +3872,7 @@ int intel_vgpu_mmio_reg_rw(struct intel_vgpu *vgpu, unsigned int offset,
        struct drm_i915_private *i915 = vgpu->gvt->gt->i915;
        struct intel_gvt *gvt = vgpu->gvt;
        struct intel_gvt_mmio_info *mmio_info;
-       struct gvt_mmio_block *mmio_block;
+       const struct gvt_mmio_block *mmio_block;
        gvt_mmio_func func;
        int ret;