#define ASPEED_VUART_ADDRL 0x28
#define ASPEED_VUART_ADDRH 0x2c
+#define ASPEED_VUART_DEFAULT_LPC_ADDR 0x3f8
+#define ASPEED_VUART_DEFAULT_SIRQ 4
+#define ASPEED_VUART_DEFAULT_SIRQ_POLARITY IRQ_TYPE_LEVEL_LOW
+
struct aspeed_vuart {
struct device *dev;
void __iomem *regs;
aspeed_vuart_set_sirq_polarity(vuart, (value & reg_mask) == 0);
}
+static int aspeed_vuart_map_irq_polarity(u32 dt)
+{
+ switch (dt) {
+ case IRQ_TYPE_LEVEL_LOW:
+ return 0;
+ case IRQ_TYPE_LEVEL_HIGH:
+ return 1;
+ default:
+ return -EINVAL;
+ }
+}
+
static int aspeed_vuart_probe(struct platform_device *pdev)
{
struct of_phandle_args sirq_polarity_sense_args;
struct aspeed_vuart *vuart;
struct device_node *np;
struct resource *res;
- u32 clk, prop;
- int rc;
+ u32 clk, prop, sirq[2];
+ int rc, sirq_polarity;
np = pdev->dev.of_node;
of_node_put(sirq_polarity_sense_args.np);
}
+ rc = of_property_read_u32(np, "aspeed,lpc-io-reg", &prop);
+ if (rc < 0)
+ prop = ASPEED_VUART_DEFAULT_LPC_ADDR;
+
+ rc = aspeed_vuart_set_lpc_address(vuart, prop);
+ if (rc < 0) {
+ dev_err(&pdev->dev, "invalid value in aspeed,lpc-io-reg property\n");
+ goto err_clk_disable;
+ }
+
+ rc = of_property_read_u32_array(np, "aspeed,lpc-interrupts", sirq, 2);
+ if (rc < 0) {
+ sirq[0] = ASPEED_VUART_DEFAULT_SIRQ;
+ sirq[1] = ASPEED_VUART_DEFAULT_SIRQ_POLARITY;
+ }
+
+ rc = aspeed_vuart_set_sirq(vuart, sirq[0]);
+ if (rc < 0) {
+ dev_err(&pdev->dev, "invalid sirq number in aspeed,lpc-interrupts property\n");
+ goto err_clk_disable;
+ }
+
+ sirq_polarity = aspeed_vuart_map_irq_polarity(sirq[1]);
+ if (sirq_polarity < 0) {
+ dev_err(&pdev->dev, "invalid sirq polarity in aspeed,lpc-interrupts property\n");
+ rc = sirq_polarity;
+ goto err_clk_disable;
+ }
+
+ aspeed_vuart_set_sirq_polarity(vuart, sirq_polarity);
+
aspeed_vuart_set_enabled(vuart, true);
aspeed_vuart_set_host_tx_discard(vuart, true);
platform_set_drvdata(pdev, vuart);