* mn10200-opc.c (mn10200_operands): Make 8 and 16 bit pc-relative

        branchs relaxable.

diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog
index 0f51c03..a855cc5 100644 (file)
--- a/opcodes/ChangeLog
+++ b/opcodes/ChangeLog
@@ -1,3 +1,8 @@
+Wed Jan 29 09:39:17 1997  Jeffrey A Law  (law@cygnus.com)
+
+       * mn10200-opc.c (mn10200_operands): Make 8 and 16 bit pc-relative
+       branchs relaxable.
+
 Tue Jan 28 15:57:34 1997  Ian Lance Taylor  <ian@cygnus.com>
 
        * mips-dis.c (print_insn_mips16): Set insn_info information.

diff --git a/opcodes/mn10200-opc.c b/opcodes/mn10200-opc.c
index 2024899..999d7cf 100644 (file)
--- a/opcodes/mn10200-opc.c
+++ b/opcodes/mn10200-opc.c
@@ -68,7 +68,7 @@ const struct mn10200_operand mn10200_operands[] = {
 /* 16 bit pc-relative immediate which may promote to a 16bit
    pc-relative immediate.  */
 #define IMM16_PCREL    (IMM16+1)
-  {16, 0, MN10200_OPERAND_PROMOTE | MN10200_OPERAND_PCREL},
+  {16, 0, MN10200_OPERAND_PCREL | MN10200_OPERAND_RELAX},
 
 /* 16bit unsigned dispacement in a memory operation which
    may promote to a 32bit displacement.  */
@@ -111,7 +111,7 @@ const struct mn10200_operand mn10200_operands[] = {
 
 /* 8 bit pc-relative displacement.  */
 #define SD8N_PCREL    (SD16+1)
-  {8, 0, MN10200_OPERAND_SIGNED | MN10200_OPERAND_PCREL},
+  {8, 0, MN10200_OPERAND_SIGNED | MN10200_OPERAND_PCREL | MN10200_OPERAND_RELAX},
 
 /* 8 bit signed immediate which may promote to 16bit signed immediate.  */
 #define SIMM8    (SD8N_PCREL+1)