ddr: add bandwidth measure support for TL1 [1/1]
authorTao Zeng <tao.zeng@amlogic.com>
Mon, 10 Dec 2018 02:21:09 +0000 (10:21 +0800)
committerJianxin Pan <jianxin.pan@amlogic.com>
Mon, 10 Dec 2018 07:29:35 +0000 (23:29 -0800)
PD#SWPL-2980

Problem:
ddr bandwidth measure is not enabled on TL1

Solution:
Add port config and dtsi for TL1

Verify:
t962x2_x301

Change-Id: I1fa932a179586f48e3698c53975b64b204a83731
Signed-off-by: Tao Zeng <tao.zeng@amlogic.com>
arch/arm/boot/dts/amlogic/mesontl1.dtsi
drivers/amlogic/ddr_tool/ddr_bandwidth.c
drivers/amlogic/ddr_tool/ddr_port_desc.c

index 59a6a8c..e2bb020 100644 (file)
                status = "okay";
        };
 
+       ddr_bandwidth {
+               compatible = "amlogic, ddr-bandwidth";
+               status = "okay";
+               reg = <0xff638000 0x100
+                      0xff638c00 0x100>;
+               interrupts = <0 52 1>;
+               interrupt-names = "ddr_bandwidth";
+       };
+
        dmc_monitor {
                compatible = "amlogic, dmc_monitor";
                status = "okay";
index d15b0eb..e73ee4a 100644 (file)
@@ -500,7 +500,7 @@ static void ddr_extcon_free(void)
  * to run, so add __ref to indicate it is okay to call __init function
  * ddr_find_port_desc
  */
-static int __ref ddr_bandwidth_probe(struct platform_device *pdev)
+static int __init ddr_bandwidth_probe(struct platform_device *pdev)
 {
        int r = 0;
 #ifdef CONFIG_OF
@@ -639,13 +639,13 @@ static struct platform_driver ddr_bandwidth_driver = {
                .of_match_table = aml_ddr_bandwidth_dt_match,
        #endif
        },
-       .probe  = ddr_bandwidth_probe,
        .remove = ddr_bandwidth_remove,
 };
 
 static int __init ddr_bandwidth_init(void)
 {
-       return platform_driver_register(&ddr_bandwidth_driver);
+       return platform_driver_probe(&ddr_bandwidth_driver,
+                                    ddr_bandwidth_probe);
 }
 
 static void __exit ddr_bandwidth_exit(void)
index bce96aa..190d4ea 100644 (file)
@@ -421,6 +421,41 @@ static struct ddr_port_desc ddr_port_desc_txhd[] __initdata = {
        { .port_id = 47, .port_name = "DEMOD"         }
 };
 
+static struct ddr_port_desc ddr_port_desc_tl1[] __initdata = {
+       { .port_id =  0, .port_name = "ARM"           },
+       { .port_id =  1, .port_name = "MALI0"         },
+       { .port_id =  3, .port_name = "HDCP_HDMI"     },
+       { .port_id =  4, .port_name = "HEVC FRONT"    },
+       { .port_id =  5, .port_name = "TEST"          },
+       { .port_id =  6, .port_name = "USB3.0"        },
+       { .port_id =  7, .port_name = "DEVICE"        },
+       { .port_id =  8, .port_name = "HEVC BACK"     },
+       { .port_id = 16, .port_name = "VPU READ1"     },
+       { .port_id = 17, .port_name = "VPU READ2"     },
+       { .port_id = 18, .port_name = "VPU READ3"     },
+       { .port_id = 19, .port_name = "VPU WRITE1"    },
+       { .port_id = 20, .port_name = "VPU WRITE2"    },
+       { .port_id = 21, .port_name = "VDEC"          },
+       { .port_id = 22, .port_name = "HCODEC"        },
+       { .port_id = 23, .port_name = "GE2D"          },
+       /* start of each device */
+       { .port_id = 32, .port_name = "SPICC1"        },
+       { .port_id = 33, .port_name = "USB0"          },
+       { .port_id = 34, .port_name = "DMA"           },
+       { .port_id = 35, .port_name = "ARB0"          },
+       { .port_id = 36, .port_name = "SD_EMMC_B"     },
+       { .port_id = 37, .port_name = "USB1"          },
+       { .port_id = 38, .port_name = "AUDIO"         },
+       { .port_id = 39, .port_name = "AIFIFO"        },
+       { .port_id = 41, .port_name = "PASER"         },
+       { .port_id = 42, .port_name = "AO CPU"        },
+       { .port_id = 43, .port_name = "SD_EMMC_C"     },
+       { .port_id = 44, .port_name = "SPICC2"        },
+       { .port_id = 45, .port_name = "ETHERNET"      },
+       { .port_id = 46, .port_name = "SANA"          },
+       { .port_id = 47, .port_name = "DEMOD"         }
+};
+
 static struct ddr_port_desc *chip_ddr_port;
 static unsigned char chip_ddr_port_num;
 
@@ -489,6 +524,11 @@ int __init ddr_find_port_desc(int cpu_type, struct ddr_port_desc **desc)
                desc_size = ARRAY_SIZE(ddr_port_desc_g12b);
                break;
 
+       case MESON_CPU_MAJOR_ID_TL1:
+               *desc = ddr_port_desc_tl1;
+               desc_size = ARRAY_SIZE(ddr_port_desc_tl1);
+               break;
+
        default:
                return -EINVAL;
        }