arm64: dts: mediatek: Add support for MT6795 Sony Xperia M5 smartphone

Add a basic support for the Sony Xperia M5 (codename "Holly")
smartphone, powered by a MediaTek Helio X10 SoC.

This achieves a console boot.

Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20221027095504.37432-7-angelogioacchino.delregno@collabora.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>

diff --git a/arch/arm64/boot/dts/mediatek/Makefile b/arch/arm64/boot/dts/mediatek/Makefile
index 0ec90cb..813e735 100644 (file)
--- a/arch/arm64/boot/dts/mediatek/Makefile
+++ b/arch/arm64/boot/dts/mediatek/Makefile
@@ -3,6 +3,7 @@ dtb-$(CONFIG_ARCH_MEDIATEK) += mt2712-evb.dtb
 dtb-$(CONFIG_ARCH_MEDIATEK) += mt6755-evb.dtb
 dtb-$(CONFIG_ARCH_MEDIATEK) += mt6779-evb.dtb
 dtb-$(CONFIG_ARCH_MEDIATEK) += mt6795-evb.dtb
+dtb-$(CONFIG_ARCH_MEDIATEK) += mt6795-sony-xperia-m5.dtb
 dtb-$(CONFIG_ARCH_MEDIATEK) += mt6797-evb.dtb
 dtb-$(CONFIG_ARCH_MEDIATEK) += mt6797-x20-dev.dtb
 dtb-$(CONFIG_ARCH_MEDIATEK) += mt7622-rfb1.dtb

diff --git a/arch/arm64/boot/dts/mediatek/mt6795-sony-xperia-m5.dts b/arch/arm64/boot/dts/mediatek/mt6795-sony-xperia-m5.dts
new file mode 100644 (file)
index 0000000..d341552
--- /dev/null
+++ b/arch/arm64/boot/dts/mediatek/mt6795-sony-xperia-m5.dts
@@ -0,0 +1,88 @@
+// SPDX-License-Identifier: GPL-2.0-only
+/*
+ * Copyright (c) 2022, Collabora Ltd
+ * Author: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
+ */
+
+/dts-v1/;
+#include "mt6795.dtsi"
+
+/ {
+       model = "Sony Xperia M5";
+       compatible = "sony,xperia-m5", "mediatek,mt6795";
+       chassis-type = "handset";
+
+       aliases {
+               mmc0 = &mmc0;
+               mmc1 = &mmc1;
+               serial0 = &uart0;
+               serial1 = &uart1;
+       };
+
+       memory@40000000 {
+               device_type = "memory";
+               reg = <0 0x40000000 0 0x1e800000>;
+       };
+
+       reserved_memory: reserved-memory {
+               #address-cells = <2>;
+               #size-cells = <2>;
+               ranges;
+
+               /* 128 KiB reserved for ARM Trusted Firmware (BL31) */
+               bl31_secmon_reserved: secmon@43000000 {
+                       reg = <0 0x43000000 0 0x30000>;
+                       no-map;
+               };
+
+               /* preloader and bootloader regions cannot be touched */
+               preloader-region@44800000 {
+                       reg = <0 0x44800000 0 0x100000>;
+                       no-map;
+               };
+
+               bootloader-region@46000000 {
+                       reg = <0 0x46000000 0 0x400000>;
+                       no-map;
+               };
+       };
+};
+
+&pio {
+       uart0_pins: uart0-pins {
+               pins-rx {
+                       pinmux = <PINMUX_GPIO113__FUNC_URXD0>;
+                       bias-pull-up;
+                       input-enable;
+               };
+               pins-tx {
+                       pinmux = <PINMUX_GPIO114__FUNC_UTXD0>;
+                       output-high;
+               };
+       };
+
+       uart2_pins: uart2-pins {
+               pins-rx {
+                       pinmux = <PINMUX_GPIO31__FUNC_URXD2>;
+                       bias-pull-up;
+                       input-enable;
+               };
+               pins-tx {
+                       pinmux = <PINMUX_GPIO32__FUNC_UTXD2>;
+               };
+       };
+};
+
+&uart0 {
+       status = "okay";
+
+       pinctrl-names = "default";
+       pinctrl-0 = <&uart0_pins>;
+};
+
+&uart2 {
+       status = "okay";
+
+       pinctrl-names = "default";
+       pinctrl-0 = <&uart2_pins>;
+};