nvmem: sunxi_sid: Drop the workaround on A64
authorSamuel Holland <samuel@sholland.org>
Mon, 6 Feb 2023 13:43:35 +0000 (13:43 +0000)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Mon, 6 Feb 2023 18:06:58 +0000 (19:06 +0100)
Now that the SRAM readout code is fixed by using 32-bit accesses, it
always returns the same values as register readout, so the A64 variant
no longer needs the workaround. This makes the D1 variant structure
redundant, so remove it.

Signed-off-by: Samuel Holland <samuel@sholland.org>
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Link: https://lore.kernel.org/r/20230206134356.839737-2-srinivas.kandagatla@linaro.org
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
drivers/nvmem/sunxi_sid.c

index 92dfe4c..a970f17 100644 (file)
@@ -197,15 +197,9 @@ static const struct sunxi_sid_cfg sun8i_h3_cfg = {
        .need_register_readout = true,
 };
 
-static const struct sunxi_sid_cfg sun20i_d1_cfg = {
-       .value_offset = 0x200,
-       .size = 0x100,
-};
-
 static const struct sunxi_sid_cfg sun50i_a64_cfg = {
        .value_offset = 0x200,
        .size = 0x100,
-       .need_register_readout = true,
 };
 
 static const struct sunxi_sid_cfg sun50i_h6_cfg = {
@@ -218,7 +212,7 @@ static const struct of_device_id sunxi_sid_of_match[] = {
        { .compatible = "allwinner,sun7i-a20-sid", .data = &sun7i_a20_cfg },
        { .compatible = "allwinner,sun8i-a83t-sid", .data = &sun50i_a64_cfg },
        { .compatible = "allwinner,sun8i-h3-sid", .data = &sun8i_h3_cfg },
-       { .compatible = "allwinner,sun20i-d1-sid", .data = &sun20i_d1_cfg },
+       { .compatible = "allwinner,sun20i-d1-sid", .data = &sun50i_a64_cfg },
        { .compatible = "allwinner,sun50i-a64-sid", .data = &sun50i_a64_cfg },
        { .compatible = "allwinner,sun50i-h5-sid", .data = &sun50i_a64_cfg },
        { .compatible = "allwinner,sun50i-h6-sid", .data = &sun50i_h6_cfg },