fix imul(reg, op, imm) emission on x64

R=bmeurer@chromium.org

BUG=

Review URL: https://codereview.chromium.org/619903005

git-svn-id: https://v8.googlecode.com/svn/branches/bleeding_edge@24395 ce2b1a6d-e550-0410-aec6-3dcde31c8c00

diff --git a/src/x64/assembler-x64.cc b/src/x64/assembler-x64.cc
index 8cc5395..01103b2 100644 (file)
--- a/src/x64/assembler-x64.cc
+++ b/src/x64/assembler-x64.cc
@@ -974,11 +974,13 @@ void Assembler::emit_imul(Register dst, const Operand& src, Immediate imm,
   emit_rex(dst, src, size);
   if (is_int8(imm.value_)) {
     emit(0x6B);
+    emit_operand(dst, src);
+    emit(imm.value_);
   } else {
     emit(0x69);
+    emit_operand(dst, src);
+    emitl(imm.value_);
   }
-  emit_operand(dst, src);
-  emit(imm.value_);
 }
 
 

diff --git a/src/x64/disasm-x64.cc b/src/x64/disasm-x64.cc
index 9b55883..dcbba9f 100644 (file)
--- a/src/x64/disasm-x64.cc
+++ b/src/x64/disasm-x64.cc
@@ -1486,15 +1486,15 @@ int DisassemblerX64::InstructionDecode(v8::internal::Vector<char> out_buffer,
 
       case 0x69:  // fall through
       case 0x6B: {
-        int mod, regop, rm;
-        get_modrm(*(data + 1), &mod, &regop, &rm);
-        int32_t imm = *data == 0x6B ? *(data + 2)
-            : *reinterpret_cast<int32_t*>(data + 2);
-        AppendToBuffer("imul%c %s,%s,0x%x",
-                       operand_size_code(),
-                       NameOfCPURegister(regop),
-                       NameOfCPURegister(rm), imm);
-        data += 2 + (*data == 0x6B ? 1 : 4);
+        int count = 1;
+        count += PrintOperands("imul", REG_OPER_OP_ORDER, data + count);
+        AppendToBuffer(",0x");
+        if (*data == 0x69) {
+          count += PrintImmediate(data + count, operand_size());
+        } else {
+          count += PrintImmediate(data + count, OPERAND_BYTE_SIZE);
+        }
+        data += count;
         break;
       }
 

diff --git a/test/cctest/test-disasm-x64.cc b/test/cctest/test-disasm-x64.cc
index 3fd3ef1..0a4882e 100644 (file)
--- a/test/cctest/test-disasm-x64.cc
+++ b/test/cctest/test-disasm-x64.cc
@@ -184,10 +184,16 @@ TEST(DisasmX64) {
   __ notq(rdx);
   __ testq(Operand(rbx, rcx, times_4, 10000), rdx);
 
-  __ imulq(rdx, Operand(rbx, rcx, times_4, 10000));
   __ imulq(rdx, rcx, Immediate(12));
   __ imulq(rdx, rcx, Immediate(1000));
+  __ imulq(rdx, Operand(rbx, rcx, times_4, 10000));
+  __ imulq(rdx, Operand(rbx, rcx, times_4, 10000), Immediate(12));
   __ imulq(rdx, Operand(rbx, rcx, times_4, 10000), Immediate(1000));
+  __ imull(r15, rcx, Immediate(12));
+  __ imull(r15, rcx, Immediate(1000));
+  __ imull(r15, Operand(rbx, rcx, times_4, 10000));
+  __ imull(r15, Operand(rbx, rcx, times_4, 10000), Immediate(12));
+  __ imull(r15, Operand(rbx, rcx, times_4, 10000), Immediate(1000));
 
   __ incq(rdx);
   __ incq(Operand(rbx, rcx, times_4, 10000));