Fixes for assembling with an ARM targeted version of GAS

diff --git a/ld/testsuite/ChangeLog b/ld/testsuite/ChangeLog
index a0d258f..aeebbd8 100644 (file)
--- a/ld/testsuite/ChangeLog
+++ b/ld/testsuite/ChangeLog
@@ -1,3 +1,12 @@
+2004-05-18  Nick Clifton  <nickc@redhat.com>
+
+       * ld-elf/frame.s: Replace @ with % so that the file can be
+       compiled by an ARM targeted GAS.
+       * ld-elf/table.s: Likewise.
+       * ld-elf/tbss.s: Likewise.  Also replace .align <foo> with
+       .p2align (log2 <foo>) to cope with the fact that the ARM .align
+       directive takes a power-of-two argument.
+
 2004-05-17  H.J. Lu  <hongjiu.lu@intel.com>
 
        * ld-elf/frame.exp: New file. Test read-only .eh_frame and

diff --git a/ld/testsuite/ld-elf/frame.s b/ld/testsuite/ld-elf/frame.s
index ece463c..c752263 100644 (file)
--- a/ld/testsuite/ld-elf/frame.s
+++ b/ld/testsuite/ld-elf/frame.s
@@ -1,2 +1,2 @@
-       .section        .eh_frame,"a",@progbits
+       .section        .eh_frame,"a",%progbits
        .4byte  0

diff --git a/ld/testsuite/ld-elf/table.s b/ld/testsuite/ld-elf/table.s
index 3641ece..2b13f70 100644 (file)
--- a/ld/testsuite/ld-elf/table.s
+++ b/ld/testsuite/ld-elf/table.s
@@ -1 +1 @@
-       .section        .gcc_except_table,"a",@progbits
+       .section        .gcc_except_table,"a",%progbits

diff --git a/ld/testsuite/ld-elf/tbss.s b/ld/testsuite/ld-elf/tbss.s
index fc3be3d..37246bb 100644 (file)
--- a/ld/testsuite/ld-elf/tbss.s
+++ b/ld/testsuite/ld-elf/tbss.s
@@ -1,15 +1,15 @@
        .file   "x.c"
 .globl bss
-       .section        .bss,"aw",@nobits
-       .align 4096
-       .type   bss,@object
+       .section        .bss,"aw",%nobits
+       .p2align 12
+       .type   bss,%object
        .size   bss,4096
 bss:
        .zero   4096
 .globl tbss
-       .section        .tbss,"awT",@nobits
-       .align 4096
-       .type   tbss,@object
+       .section        .tbss,"awT",%nobits
+       .p2align 12
+       .type   tbss,%object
        .size   tbss,4096
 tbss:
        .zero   4096