radeon/vcn: enable parsing support for st_rps_bits

Set st_rps_bits in hevc message buffer and set corresponding flag to indicate
that st_rps_bits will be used for parsing the short_term_ref_pic_set structure.

Signed-off-by: Boyuan Zhang <boyuan.zhang@amd.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10889>

diff --git a/src/gallium/drivers/radeon/radeon_vcn_dec.c b/src/gallium/drivers/radeon/radeon_vcn_dec.c
index 3b0edcf..47c3c6d 100644 (file)
--- a/src/gallium/drivers/radeon/radeon_vcn_dec.c
+++ b/src/gallium/drivers/radeon/radeon_vcn_dec.c
@@ -198,6 +198,8 @@ static rvcn_dec_message_hevc_t get_h265_msg(struct radeon_decoder *dec,
       result.sps_info_flags |= 1 << 9;
    if (pic->UseRefPicList == true)
       result.sps_info_flags |= 1 << 10;
+   if (pic->UseStRpsBits == true)
+      result.sps_info_flags |= 1 << 11;
 
    result.chroma_format = pic->pps->sps->chroma_format_idc;
    result.bit_depth_luma_minus8 = pic->pps->sps->bit_depth_luma_minus8;
@@ -257,6 +259,7 @@ static rvcn_dec_message_hevc_t get_h265_msg(struct radeon_decoder *dec,
    result.num_tile_rows_minus1 = pic->pps->num_tile_rows_minus1;
    result.log2_parallel_merge_level_minus2 = pic->pps->log2_parallel_merge_level_minus2;
    result.init_qp_minus26 = pic->pps->init_qp_minus26;
+   result.st_rps_bits = pic->pps->st_rps_bits;
 
    for (i = 0; i < 19; ++i)
       result.column_width_minus1[i] = pic->pps->column_width_minus1[i];

diff --git a/src/gallium/drivers/radeon/radeon_vcn_dec.h b/src/gallium/drivers/radeon/radeon_vcn_dec.h
index 0e3443d..253a0a9 100644 (file)
--- a/src/gallium/drivers/radeon/radeon_vcn_dec.h
+++ b/src/gallium/drivers/radeon/radeon_vcn_dec.h
@@ -745,6 +745,7 @@ typedef struct rvcn_dec_message_hevc_s {
    unsigned char hevc_reserved[2];
 
    unsigned char direct_reflist[2][15];
+   unsigned int st_rps_bits;
 } rvcn_dec_message_hevc_t;
 
 typedef struct rvcn_dec_message_vp9_s {