staging: comedi: vmk80xx: tidy up defines
authorH Hartley Sweeten <hsweeten@visionengravers.com>
Fri, 14 Aug 2015 21:35:29 +0000 (14:35 -0700)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Sun, 13 Sep 2015 01:24:15 +0000 (18:24 -0700)
For aesthetics, use tabs instead of spaces for the whitespace.

Convert the bit defines to use the preferred BIT macro.

Signed-off-by: H Hartley Sweeten <hsweeten@visionengravers.com>
Reviewed-by: Ian Abbott <abbotti@mev.co.uk>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
drivers/staging/comedi/drivers/vmk80xx.c

index 3293f1a..8c7393e 100644 (file)
@@ -52,52 +52,52 @@ enum {
        DEVICE_VMK8061
 };
 
-#define VMK8055_DI_REG          0x00
-#define VMK8055_DO_REG          0x01
-#define VMK8055_AO1_REG         0x02
-#define VMK8055_AO2_REG         0x03
-#define VMK8055_AI1_REG         0x02
-#define VMK8055_AI2_REG         0x03
-#define VMK8055_CNT1_REG        0x04
-#define VMK8055_CNT2_REG        0x06
-
-#define VMK8061_CH_REG          0x01
-#define VMK8061_DI_REG          0x01
-#define VMK8061_DO_REG          0x01
-#define VMK8061_PWM_REG1        0x01
-#define VMK8061_PWM_REG2        0x02
-#define VMK8061_CNT_REG         0x02
-#define VMK8061_AO_REG          0x02
-#define VMK8061_AI_REG1         0x02
-#define VMK8061_AI_REG2         0x03
-
-#define VMK8055_CMD_RST         0x00
-#define VMK8055_CMD_DEB1_TIME   0x01
-#define VMK8055_CMD_DEB2_TIME   0x02
-#define VMK8055_CMD_RST_CNT1    0x03
-#define VMK8055_CMD_RST_CNT2    0x04
-#define VMK8055_CMD_WRT_AD      0x05
-
-#define VMK8061_CMD_RD_AI       0x00
-#define VMK8061_CMR_RD_ALL_AI   0x01   /* !non-active! */
-#define VMK8061_CMD_SET_AO      0x02
-#define VMK8061_CMD_SET_ALL_AO  0x03   /* !non-active! */
-#define VMK8061_CMD_OUT_PWM     0x04
-#define VMK8061_CMD_RD_DI       0x05
-#define VMK8061_CMD_DO          0x06   /* !non-active! */
-#define VMK8061_CMD_CLR_DO      0x07
-#define VMK8061_CMD_SET_DO      0x08
-#define VMK8061_CMD_RD_CNT      0x09   /* TODO: completely pointless? */
-#define VMK8061_CMD_RST_CNT     0x0a   /* TODO: completely pointless? */
-#define VMK8061_CMD_RD_VERSION  0x0b   /* internal usage */
-#define VMK8061_CMD_RD_JMP_STAT 0x0c   /* TODO: not implemented yet */
-#define VMK8061_CMD_RD_PWR_STAT 0x0d   /* internal usage */
-#define VMK8061_CMD_RD_DO       0x0e
-#define VMK8061_CMD_RD_AO       0x0f
-#define VMK8061_CMD_RD_PWM      0x10
-
-#define IC3_VERSION             (1 << 0)
-#define IC6_VERSION             (1 << 1)
+#define VMK8055_DI_REG         0x00
+#define VMK8055_DO_REG         0x01
+#define VMK8055_AO1_REG                0x02
+#define VMK8055_AO2_REG                0x03
+#define VMK8055_AI1_REG                0x02
+#define VMK8055_AI2_REG                0x03
+#define VMK8055_CNT1_REG       0x04
+#define VMK8055_CNT2_REG       0x06
+
+#define VMK8061_CH_REG         0x01
+#define VMK8061_DI_REG         0x01
+#define VMK8061_DO_REG         0x01
+#define VMK8061_PWM_REG1       0x01
+#define VMK8061_PWM_REG2       0x02
+#define VMK8061_CNT_REG                0x02
+#define VMK8061_AO_REG         0x02
+#define VMK8061_AI_REG1                0x02
+#define VMK8061_AI_REG2                0x03
+
+#define VMK8055_CMD_RST                0x00
+#define VMK8055_CMD_DEB1_TIME  0x01
+#define VMK8055_CMD_DEB2_TIME  0x02
+#define VMK8055_CMD_RST_CNT1   0x03
+#define VMK8055_CMD_RST_CNT2   0x04
+#define VMK8055_CMD_WRT_AD     0x05
+
+#define VMK8061_CMD_RD_AI      0x00
+#define VMK8061_CMR_RD_ALL_AI  0x01    /* !non-active! */
+#define VMK8061_CMD_SET_AO     0x02
+#define VMK8061_CMD_SET_ALL_AO 0x03    /* !non-active! */
+#define VMK8061_CMD_OUT_PWM    0x04
+#define VMK8061_CMD_RD_DI      0x05
+#define VMK8061_CMD_DO         0x06    /* !non-active! */
+#define VMK8061_CMD_CLR_DO     0x07
+#define VMK8061_CMD_SET_DO     0x08
+#define VMK8061_CMD_RD_CNT     0x09    /* TODO: completely pointless? */
+#define VMK8061_CMD_RST_CNT    0x0a    /* TODO: completely pointless? */
+#define VMK8061_CMD_RD_VERSION 0x0b    /* internal usage */
+#define VMK8061_CMD_RD_JMP_STAT        0x0c    /* TODO: not implemented yet */
+#define VMK8061_CMD_RD_PWR_STAT        0x0d    /* internal usage */
+#define VMK8061_CMD_RD_DO      0x0e
+#define VMK8061_CMD_RD_AO      0x0f
+#define VMK8061_CMD_RD_PWM     0x10
+
+#define IC3_VERSION            BIT(0)
+#define IC6_VERSION            BIT(1)
 
 enum vmk80xx_model {
        VMK8055_MODEL,