RISC-V: try new extension properties in of_early_processor_hartid()
authorConor Dooley <conor.dooley@microchip.com>
Thu, 13 Jul 2023 12:11:08 +0000 (13:11 +0100)
committerPalmer Dabbelt <palmer@rivosinc.com>
Tue, 25 Jul 2023 23:26:24 +0000 (16:26 -0700)
To fully deprecate the kernel's use of "riscv,isa",
of_early_processor_hartid() needs to first try using the new properties,
before falling back to "riscv,isa".

Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
Link: https://lore.kernel.org/r/20230713-tablet-jimmy-987fea0eb2e1@wendy
Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
arch/riscv/kernel/cpu.c

index 4f1f12f..28d5af2 100644 (file)
@@ -61,8 +61,35 @@ int riscv_early_of_processor_hartid(struct device_node *node, unsigned long *har
                return -ENODEV;
        }
 
+       if (of_property_read_string(node, "riscv,isa-base", &isa))
+               goto old_interface;
+
+       if (IS_ENABLED(CONFIG_32BIT) && strncasecmp(isa, "rv32i", 5)) {
+               pr_warn("CPU with hartid=%lu does not support rv32i", *hart);
+               return -ENODEV;
+       }
+
+       if (IS_ENABLED(CONFIG_64BIT) && strncasecmp(isa, "rv64i", 5)) {
+               pr_warn("CPU with hartid=%lu does not support rv64i", *hart);
+               return -ENODEV;
+       }
+
+       if (!of_property_present(node, "riscv,isa-extensions"))
+               return -ENODEV;
+
+       if (of_property_match_string(node, "riscv,isa-extensions", "i") < 0 ||
+           of_property_match_string(node, "riscv,isa-extensions", "m") < 0 ||
+           of_property_match_string(node, "riscv,isa-extensions", "a") < 0) {
+               pr_warn("CPU with hartid=%lu does not support ima", *hart);
+               return -ENODEV;
+       }
+
+       return 0;
+
+old_interface:
        if (of_property_read_string(node, "riscv,isa", &isa)) {
-               pr_warn("CPU with hartid=%lu has no \"riscv,isa\" property\n", *hart);
+               pr_warn("CPU with hartid=%lu has no \"riscv,isa-base\" or \"riscv,isa\" property\n",
+                       *hart);
                return -ENODEV;
        }