return 0;
}
+ cxl_device_lock(&root_port->dev);
rc = cxl_add_dport(root_port, match, uid, ctx.chbcr);
+ cxl_device_unlock(&root_port->dev);
if (rc) {
dev_err(host, "failed to add downstream port: %s\n",
dev_name(match));
{
struct cxl_dport *dup;
- cxl_device_lock(&port->dev);
+ device_lock_assert(&port->dev);
dup = find_dport(port, new->port_id);
if (dup)
dev_err(&port->dev,
dev_name(dup->dport));
else
list_add_tail(&new->list, &port->dports);
- cxl_device_unlock(&port->dev);
return dup ? -EEXIST : 0;
}
/* TODO walk DVSEC to find component register base */
port_num = FIELD_GET(PCI_EXP_LNKCAP_PN, lnkcap);
+ cxl_device_lock(&port->dev);
rc = cxl_add_dport(port, &pdev->dev, port_num, CXL_RESOURCE_NONE);
+ cxl_device_unlock(&port->dev);
if (rc) {
dev_err(dev, "failed to add dport: %s (%d)\n",
dev_name(&pdev->dev), rc);
struct device *dev = ctx->dev;
int rc;
+ cxl_device_lock(&port->dev);
rc = cxl_add_dport(port, &pdev->dev, pdev->id, CXL_RESOURCE_NONE);
+ cxl_device_unlock(&port->dev);
if (rc) {
dev_err(dev, "failed to add dport: %s (%d)\n",
dev_name(&pdev->dev), rc);