iwlwifi: refactor NIC init sequence

The typical sequence of setting INIT_DONE and then waiting
for clock stabilisation is going to need a new workarounds,
so first of all refactor it.

Signed-off-by: Johannes Berg <johannes.berg@intel.com>
Signed-off-by: Luca Coelho <luciano.coelho@intel.com>

diff --git a/drivers/net/wireless/intel/iwlwifi/iwl-eeprom-read.c b/drivers/net/wireless/intel/iwlwifi/iwl-eeprom-read.c
index a6db6a8..82e8719 100644 (file)
--- a/drivers/net/wireless/intel/iwlwifi/iwl-eeprom-read.c
+++ b/drivers/net/wireless/intel/iwlwifi/iwl-eeprom-read.c
@@ -193,34 +193,25 @@ static int iwl_init_otp_access(struct iwl_trans *trans)
 {
        int ret;
 
-       /* Enable 40MHz radio clock */
-       iwl_write32(trans, CSR_GP_CNTRL,
-                   iwl_read32(trans, CSR_GP_CNTRL) |
-                   BIT(trans->cfg->csr->flag_init_done));
-
-       /* wait for clock to be ready */
-       ret = iwl_poll_bit(trans, CSR_GP_CNTRL,
-                          BIT(trans->cfg->csr->flag_mac_clock_ready),
-                          BIT(trans->cfg->csr->flag_mac_clock_ready),
-                          25000);
-       if (ret < 0) {
-               IWL_ERR(trans, "Time out access OTP\n");
-       } else {
-               iwl_set_bits_prph(trans, APMG_PS_CTRL_REG,
-                                 APMG_PS_CTRL_VAL_RESET_REQ);
-               udelay(5);
-               iwl_clear_bits_prph(trans, APMG_PS_CTRL_REG,
-                                   APMG_PS_CTRL_VAL_RESET_REQ);
-
-               /*
-                * CSR auto clock gate disable bit -
-                * this is only applicable for HW with OTP shadow RAM
-                */
-               if (trans->cfg->base_params->shadow_ram_support)
-                       iwl_set_bit(trans, CSR_DBG_LINK_PWR_MGMT_REG,
-                                   CSR_RESET_LINK_PWR_MGMT_DISABLED);
-       }
-       return ret;
+       ret = iwl_finish_nic_init(trans);
+       if (ret)
+               return ret;
+
+       iwl_set_bits_prph(trans, APMG_PS_CTRL_REG,
+                         APMG_PS_CTRL_VAL_RESET_REQ);
+       udelay(5);
+       iwl_clear_bits_prph(trans, APMG_PS_CTRL_REG,
+                           APMG_PS_CTRL_VAL_RESET_REQ);
+
+       /*
+        * CSR auto clock gate disable bit -
+        * this is only applicable for HW with OTP shadow RAM
+        */
+       if (trans->cfg->base_params->shadow_ram_support)
+               iwl_set_bit(trans, CSR_DBG_LINK_PWR_MGMT_REG,
+                           CSR_RESET_LINK_PWR_MGMT_DISABLED);
+
+       return 0;
 }
 
 static int iwl_read_otp_word(struct iwl_trans *trans, u16 addr,

diff --git a/drivers/net/wireless/intel/iwlwifi/iwl-io.c b/drivers/net/wireless/intel/iwlwifi/iwl-io.c
index d62eb2d..4ea5883 100644 (file)
--- a/drivers/net/wireless/intel/iwlwifi/iwl-io.c
+++ b/drivers/net/wireless/intel/iwlwifi/iwl-io.c
@@ -488,3 +488,33 @@ int iwl_dump_fh(struct iwl_trans *trans, char **buf)
 
        return 0;
 }
+
+int iwl_finish_nic_init(struct iwl_trans *trans)
+{
+       int err;
+
+       /*
+        * Set "initialization complete" bit to move adapter from
+        * D0U* --> D0A* (powered-up active) state.
+        */
+       iwl_set_bit(trans, CSR_GP_CNTRL,
+                   BIT(trans->cfg->csr->flag_init_done));
+
+       if (trans->cfg->device_family == IWL_DEVICE_FAMILY_8000)
+               udelay(2);
+
+       /*
+        * Wait for clock stabilization; once stabilized, access to
+        * device-internal resources is supported, e.g. iwl_write_prph()
+        * and accesses to uCode SRAM.
+        */
+       err = iwl_poll_bit(trans, CSR_GP_CNTRL,
+                          BIT(trans->cfg->csr->flag_mac_clock_ready),
+                          BIT(trans->cfg->csr->flag_mac_clock_ready),
+                          25000);
+       if (err < 0)
+               IWL_DEBUG_INFO(trans, "Failed to wake NIC\n");
+
+       return err < 0 ? err : 0;
+}
+IWL_EXPORT_SYMBOL(iwl_finish_nic_init);

diff --git a/drivers/net/wireless/intel/iwlwifi/iwl-io.h b/drivers/net/wireless/intel/iwlwifi/iwl-io.h
index 61477e5..bf11008 100644 (file)
--- a/drivers/net/wireless/intel/iwlwifi/iwl-io.h
+++ b/drivers/net/wireless/intel/iwlwifi/iwl-io.h
@@ -5,6 +5,8 @@
  *
  * GPL LICENSE SUMMARY
  *
+ * Copyright (C) 2018 Intel Corporation
+ *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of version 2 of the GNU General Public License as
  * published by the Free Software Foundation.
@@ -23,6 +25,7 @@
  *
  * BSD LICENSE
  *
+ * Copyright (C) 2018 Intel Corporation
  * All rights reserved.
  *
  * Redistribution and use in source and binary forms, with or without
@@ -96,6 +99,8 @@ void iwl_set_bits_mask_prph(struct iwl_trans *trans, u32 ofs,
 void iwl_clear_bits_prph(struct iwl_trans *trans, u32 ofs, u32 mask);
 void iwl_force_nmi(struct iwl_trans *trans);
 
+int iwl_finish_nic_init(struct iwl_trans *trans);
+
 /* Error handling */
 int iwl_dump_fh(struct iwl_trans *trans, char **buf);
 

diff --git a/drivers/net/wireless/intel/iwlwifi/mvm/utils.c b/drivers/net/wireless/intel/iwlwifi/mvm/utils.c
index 92f61e8..4a18997 100644 (file)
--- a/drivers/net/wireless/intel/iwlwifi/mvm/utils.c
+++ b/drivers/net/wireless/intel/iwlwifi/mvm/utils.c
@@ -523,23 +523,9 @@ static void iwl_mvm_dump_lmac_error_log(struct iwl_mvm *mvm, u8 lmac_num)
                /* reset the device */
                iwl_trans_sw_reset(trans);
 
-               /* set INIT_DONE flag */
-               iwl_set_bit(trans, CSR_GP_CNTRL,
-                           BIT(trans->cfg->csr->flag_init_done));
-
-               /* and wait for clock stabilization */
-               if (trans->cfg->device_family == IWL_DEVICE_FAMILY_8000)
-                       udelay(2);
-
-               err = iwl_poll_bit(trans, CSR_GP_CNTRL,
-                                  BIT(trans->cfg->csr->flag_mac_clock_ready),
-                                  BIT(trans->cfg->csr->flag_mac_clock_ready),
-                                  25000);
-               if (err < 0) {
-                       IWL_DEBUG_INFO(trans,
-                                      "Failed to reset the card for the dump\n");
+               err = iwl_finish_nic_init(trans);
+               if (err)
                        return;
-               }
        }
 
        iwl_trans_read_mem_bytes(trans, base, &table, sizeof(table));

diff --git a/drivers/net/wireless/intel/iwlwifi/pcie/trans-gen2.c b/drivers/net/wireless/intel/iwlwifi/pcie/trans-gen2.c
index 77f3610..e2d6437 100644 (file)
--- a/drivers/net/wireless/intel/iwlwifi/pcie/trans-gen2.c
+++ b/drivers/net/wireless/intel/iwlwifi/pcie/trans-gen2.c
@@ -92,26 +92,9 @@ int iwl_pcie_gen2_apm_init(struct iwl_trans *trans)
 
        iwl_pcie_apm_config(trans);
 
-       /*
-        * Set "initialization complete" bit to move adapter from
-        * D0U* --> D0A* (powered-up active) state.
-        */
-       iwl_set_bit(trans, CSR_GP_CNTRL,
-                   BIT(trans->cfg->csr->flag_init_done));
-
-       /*
-        * Wait for clock stabilization; once stabilized, access to
-        * device-internal resources is supported, e.g. iwl_write_prph()
-        * and accesses to uCode SRAM.
-        */
-       ret = iwl_poll_bit(trans, CSR_GP_CNTRL,
-                          BIT(trans->cfg->csr->flag_mac_clock_ready),
-                          BIT(trans->cfg->csr->flag_mac_clock_ready),
-                          25000);
-       if (ret < 0) {
-               IWL_DEBUG_INFO(trans, "Failed to init the card\n");
+       ret = iwl_finish_nic_init(trans);
+       if (ret)
                return ret;
-       }
 
        set_bit(STATUS_DEVICE_ENABLED, &trans->status);
 

diff --git a/drivers/net/wireless/intel/iwlwifi/pcie/trans.c b/drivers/net/wireless/intel/iwlwifi/pcie/trans.c
index 0b29b2e..375d8f2 100644 (file)
--- a/drivers/net/wireless/intel/iwlwifi/pcie/trans.c
+++ b/drivers/net/wireless/intel/iwlwifi/pcie/trans.c
@@ -364,26 +364,9 @@ static int iwl_pcie_apm_init(struct iwl_trans *trans)
        if (trans->cfg->base_params->pll_cfg)
                iwl_set_bit(trans, CSR_ANA_PLL_CFG, CSR50_ANA_PLL_CFG_VAL);
 
-       /*
-        * Set "initialization complete" bit to move adapter from
-        * D0U* --> D0A* (powered-up active) state.
-        */
-       iwl_set_bit(trans, CSR_GP_CNTRL,
-                   BIT(trans->cfg->csr->flag_init_done));
-
-       /*
-        * Wait for clock stabilization; once stabilized, access to
-        * device-internal resources is supported, e.g. iwl_write_prph()
-        * and accesses to uCode SRAM.
-        */
-       ret = iwl_poll_bit(trans, CSR_GP_CNTRL,
-                          BIT(trans->cfg->csr->flag_mac_clock_ready),
-                          BIT(trans->cfg->csr->flag_mac_clock_ready),
-                          25000);
-       if (ret < 0) {
-               IWL_ERR(trans, "Failed to init the card\n");
+       ret = iwl_finish_nic_init(trans);
+       if (ret)
                return ret;
-       }
 
        if (trans->cfg->host_interrupt_operation_mode) {
                /*
@@ -453,23 +436,8 @@ static void iwl_pcie_apm_lp_xtal_enable(struct iwl_trans *trans)
 
        iwl_trans_pcie_sw_reset(trans);
 
-       /*
-        * Set "initialization complete" bit to move adapter from
-        * D0U* --> D0A* (powered-up active) state.
-        */
-       iwl_set_bit(trans, CSR_GP_CNTRL,
-                   BIT(trans->cfg->csr->flag_init_done));
-
-       /*
-        * Wait for clock stabilization; once stabilized, access to
-        * device-internal resources is possible.
-        */
-       ret = iwl_poll_bit(trans, CSR_GP_CNTRL,
-                          BIT(trans->cfg->csr->flag_mac_clock_ready),
-                          BIT(trans->cfg->csr->flag_mac_clock_ready),
-                          25000);
-       if (WARN_ON(ret < 0)) {
-               IWL_ERR(trans, "Access time out - failed to enable LP XTAL\n");
+       ret = iwl_finish_nic_init(trans);
+       if (WARN_ON(ret)) {
                /* Release XTAL ON request */
                __iwl_trans_pcie_clear_bit(trans, CSR_GP_CNTRL,
                                           CSR_GP_CNTRL_REG_FLAG_XTAL_ON);
@@ -1558,20 +1526,10 @@ static int iwl_trans_pcie_d3_resume(struct iwl_trans *trans,
 
        iwl_set_bit(trans, CSR_GP_CNTRL,
                    BIT(trans->cfg->csr->flag_mac_access_req));
-       iwl_set_bit(trans, CSR_GP_CNTRL,
-                   BIT(trans->cfg->csr->flag_init_done));
 
-       if (trans->cfg->device_family >= IWL_DEVICE_FAMILY_8000)
-               udelay(2);
-
-       ret = iwl_poll_bit(trans, CSR_GP_CNTRL,
-                          BIT(trans->cfg->csr->flag_mac_clock_ready),
-                          BIT(trans->cfg->csr->flag_mac_clock_ready),
-                          25000);
-       if (ret < 0) {
-               IWL_ERR(trans, "Failed to resume the device (mac ready)\n");
+       ret = iwl_finish_nic_init(trans);
+       if (ret)
                return ret;
-       }
 
        /*
         * Reconfigure IVAR table in case of MSIX or reset ict table in
@@ -3521,18 +3479,9 @@ struct iwl_trans *iwl_trans_pcie_alloc(struct pci_dev *pdev,
                 * in-order to recognize C step driver should read chip version
                 * id located at the AUX bus MISC address space.
                 */
-               iwl_set_bit(trans, CSR_GP_CNTRL,
-                           BIT(trans->cfg->csr->flag_init_done));
-               udelay(2);
-
-               ret = iwl_poll_bit(trans, CSR_GP_CNTRL,
-                                  BIT(trans->cfg->csr->flag_mac_clock_ready),
-                                  BIT(trans->cfg->csr->flag_mac_clock_ready),
-                                  25000);
-               if (ret < 0) {
-                       IWL_DEBUG_INFO(trans, "Failed to wake up the nic\n");
+               ret = iwl_finish_nic_init(trans);
+               if (ret)
                        goto out_no_pci;
-               }
 
                if (iwl_trans_grab_nic_access(trans, &flags)) {
                        u32 hw_step;