can: flexcan: Use struct_group() to zero struct flexcan_regs regions

In preparation for FORTIFY_SOURCE performing compile-time and run-time
field bounds checking for memset(), avoid intentionally writing across
neighboring fields.

Add struct_group() to mark both regions of struct flexcan_regs that get
initialized to zero. Avoid the future warnings:

In function 'fortify_memset_chk',
    inlined from 'memset_io' at ./include/asm-generic/io.h:1169:2,
    inlined from 'flexcan_ram_init' at drivers/net/can/flexcan.c:1403:2:
./include/linux/fortify-string.h:199:4: warning: call to '__write_overflow_field' declared with attribute warning: detected write beyond size of field (1st parameter); maybe use struct_group()? [-Wattribute-warning]
  199 |    __write_overflow_field(p_size_field, size);
      |    ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
In function 'fortify_memset_chk',
    inlined from 'memset_io' at ./include/asm-generic/io.h:1169:2,
    inlined from 'flexcan_ram_init' at drivers/net/can/flexcan.c:1408:3:
./include/linux/fortify-string.h:199:4: warning: call to '__write_overflow_field' declared with attribute warning: detected write beyond size of field (1st parameter); maybe use struct_group()? [-Wattribute-warning]
  199 |    __write_overflow_field(p_size_field, size);
      |    ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~

Cc: Wolfgang Grandegger <wg@grandegger.com>
Cc: "David S. Miller" <davem@davemloft.net>
Cc: Jakub Kicinski <kuba@kernel.org>
Cc: linux-can@vger.kernel.org
Cc: netdev@vger.kernel.org
Acked-by: Marc Kleine-Budde <mkl@pengutronix.de>
Signed-off-by: Kees Cook <keescook@chromium.org>

diff --git a/drivers/net/can/flexcan.c b/drivers/net/can/flexcan.c
index 7734229..12b60ad 100644 (file)
--- a/drivers/net/can/flexcan.c
+++ b/drivers/net/can/flexcan.c
@@ -290,31 +290,33 @@ struct flexcan_regs {
        u32 dbg1;               /* 0x58 */
        u32 dbg2;               /* 0x5c */
        u32 _reserved3[8];      /* 0x60 */
-       u8 mb[2][512];          /* 0x80 - Not affected by Soft Reset */
-       /* FIFO-mode:
-        *                      MB
-        * 0x080...0x08f        0       RX message buffer
-        * 0x090...0x0df        1-5     reserved
-        * 0x0e0...0x0ff        6-7     8 entry ID table
-        *                              (mx25, mx28, mx35, mx53)
-        * 0x0e0...0x2df        6-7..37 8..128 entry ID table
-        *                              size conf'ed via ctrl2::RFFN
-        *                              (mx6, vf610)
-        */
-       u32 _reserved4[256];    /* 0x480 */
-       u32 rximr[64];          /* 0x880 - Not affected by Soft Reset */
-       u32 _reserved5[24];     /* 0x980 */
-       u32 gfwr_mx6;           /* 0x9e0 - MX6 */
-       u32 _reserved6[39];     /* 0x9e4 */
-       u32 _rxfir[6];          /* 0xa80 */
-       u32 _reserved8[2];      /* 0xa98 */
-       u32 _rxmgmask;          /* 0xaa0 */
-       u32 _rxfgmask;          /* 0xaa4 */
-       u32 _rx14mask;          /* 0xaa8 */
-       u32 _rx15mask;          /* 0xaac */
-       u32 tx_smb[4];          /* 0xab0 */
-       u32 rx_smb0[4];         /* 0xac0 */
-       u32 rx_smb1[4];         /* 0xad0 */
+       struct_group(init,
+               u8 mb[2][512];          /* 0x80 - Not affected by Soft Reset */
+               /* FIFO-mode:
+                *                      MB
+                * 0x080...0x08f        0       RX message buffer
+                * 0x090...0x0df        1-5     reserved
+                * 0x0e0...0x0ff        6-7     8 entry ID table
+                *                              (mx25, mx28, mx35, mx53)
+                * 0x0e0...0x2df        6-7..37 8..128 entry ID table
+                *                              size conf'ed via ctrl2::RFFN
+                *                              (mx6, vf610)
+                */
+               u32 _reserved4[256];    /* 0x480 */
+               u32 rximr[64];          /* 0x880 - Not affected by Soft Reset */
+               u32 _reserved5[24];     /* 0x980 */
+               u32 gfwr_mx6;           /* 0x9e0 - MX6 */
+               u32 _reserved6[39];     /* 0x9e4 */
+               u32 _rxfir[6];          /* 0xa80 */
+               u32 _reserved8[2];      /* 0xa98 */
+               u32 _rxmgmask;          /* 0xaa0 */
+               u32 _rxfgmask;          /* 0xaa4 */
+               u32 _rx14mask;          /* 0xaa8 */
+               u32 _rx15mask;          /* 0xaac */
+               u32 tx_smb[4];          /* 0xab0 */
+               u32 rx_smb0[4];         /* 0xac0 */
+               u32 rx_smb1[4];         /* 0xad0 */
+       );
        u32 mecr;               /* 0xae0 */
        u32 erriar;             /* 0xae4 */
        u32 erridpr;            /* 0xae8 */
@@ -328,9 +330,11 @@ struct flexcan_regs {
        u32 fdcbt;              /* 0xc04 - Not affected by Soft Reset */
        u32 fdcrc;              /* 0xc08 */
        u32 _reserved9[199];    /* 0xc0c */
-       u32 tx_smb_fd[18];      /* 0xf28 */
-       u32 rx_smb0_fd[18];     /* 0xf70 */
-       u32 rx_smb1_fd[18];     /* 0xfb8 */
+       struct_group(init_fd,
+               u32 tx_smb_fd[18];      /* 0xf28 */
+               u32 rx_smb0_fd[18];     /* 0xf70 */
+               u32 rx_smb1_fd[18];     /* 0xfb8 */
+       );
 };
 
 static_assert(sizeof(struct flexcan_regs) ==  0x4 * 18 + 0xfb8);
@@ -1400,14 +1404,10 @@ static void flexcan_ram_init(struct net_device *dev)
        reg_ctrl2 |= FLEXCAN_CTRL2_WRMFRZ;
        priv->write(reg_ctrl2, &regs->ctrl2);
 
-       memset_io(&regs->mb[0][0], 0,
-                 offsetof(struct flexcan_regs, rx_smb1[3]) -
-                 offsetof(struct flexcan_regs, mb[0][0]) + 0x4);
+       memset_io(&regs->init, 0, sizeof(regs->init));
 
        if (priv->can.ctrlmode & CAN_CTRLMODE_FD)
-               memset_io(&regs->tx_smb_fd[0], 0,
-                         offsetof(struct flexcan_regs, rx_smb1_fd[17]) -
-                         offsetof(struct flexcan_regs, tx_smb_fd[0]) + 0x4);
+               memset_io(&regs->init_fd, 0, sizeof(regs->init_fd));
 
        reg_ctrl2 &= ~FLEXCAN_CTRL2_WRMFRZ;
        priv->write(reg_ctrl2, &regs->ctrl2);