/// regalloc pass.
virtual FunctionPass *createRegAllocPass(bool Optimized);
- /// Add core register alloator passes which do the actual register assignment
+ /// Add core register allocator passes which do the actual register assignment
/// and rewriting. \returns true if any passes were added.
- virtual bool addRegAssignmentFast();
- virtual bool addRegAssignmentOptimized();
+ virtual bool addRegAssignAndRewriteFast();
+ virtual bool addRegAssignAndRewriteOptimized();
};
void registerCodeGenCallback(PassInstrumentationCallbacks &PIC,
return createTargetRegisterAllocator(Optimized);
}
-bool TargetPassConfig::addRegAssignmentFast() {
+bool TargetPassConfig::addRegAssignAndRewriteFast() {
if (RegAlloc != &useDefaultRegisterAllocator &&
RegAlloc != &createFastRegisterAllocator)
report_fatal_error("Must use fast (default) register allocator for unoptimized regalloc.");
return true;
}
-bool TargetPassConfig::addRegAssignmentOptimized() {
+bool TargetPassConfig::addRegAssignAndRewriteOptimized() {
// Add the selected register allocation pass.
addPass(createRegAllocPass(true));
// Finally rewrite virtual registers.
addPass(&VirtRegRewriterID);
- // Perform stack slot coloring and post-ra machine LICM.
- //
- // FIXME: Re-enable coloring with register when it's capable of adding
- // kill markers.
- addPass(&StackSlotColoringID);
-
return true;
}
addPass(&PHIEliminationID, false);
addPass(&TwoAddressInstructionPassID, false);
- addRegAssignmentFast();
+ addRegAssignAndRewriteFast();
}
/// Add standard target-independent passes that are tightly coupled with
// PreRA instruction scheduling.
addPass(&MachineSchedulerID);
- if (addRegAssignmentOptimized()) {
+ if (addRegAssignAndRewriteOptimized()) {
+ // Perform stack slot coloring and post-ra machine LICM.
+ //
+ // FIXME: Re-enable coloring with register when it's capable of adding
+ // kill markers.
+ addPass(&StackSlotColoringID);
+
// Allow targets to expand pseudo instructions depending on the choice of
// registers before MachineCopyPropagation.
addPostRewrite();
void addFastRegAlloc() override;
void addOptimizedRegAlloc() override;
- bool addRegAssignmentFast() override {
+ bool addRegAssignAndRewriteFast() override {
llvm_unreachable("should not be used");
}
- bool addRegAssignmentOptimized() override {
+ bool addRegAssignAndRewriteOptimized() override {
llvm_unreachable("should not be used");
}
void addPreEmitPass() override;
// No reg alloc
- bool addRegAssignmentFast() override { return false; }
+ bool addRegAssignAndRewriteFast() override { return false; }
// No reg alloc
- bool addRegAssignmentOptimized() override { return false; }
+ bool addRegAssignAndRewriteOptimized() override { return false; }
};
} // end anonymous namespace