media: dt: bindings: tegra-vde: Document OPP and power domain
authorDmitry Osipenko <digetx@gmail.com>
Tue, 30 Nov 2021 23:23:33 +0000 (02:23 +0300)
committerThierry Reding <treding@nvidia.com>
Fri, 17 Dec 2021 13:58:06 +0000 (14:58 +0100)
Document new OPP table and power domain properties of the video decoder
hardware.

Reviewed-by: Rob Herring <robh@kernel.org>
Acked-by: Hans Verkuil <hverkuil-cisco@xs4all.nl>
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Documentation/devicetree/bindings/media/nvidia,tegra-vde.yaml

index c143aaa..4ecdee1 100644 (file)
@@ -68,6 +68,16 @@ properties:
     description:
       Phandle of the SRAM MMIO node.
 
+  operating-points-v2:
+    description:
+      Should contain freqs and voltages and opp-supported-hw property,
+      which is a bitfield indicating SoC speedo or process ID mask.
+
+  power-domains:
+    maxItems: 1
+    description:
+      Phandle to the SoC core power domain.
+
 required:
   - compatible
   - reg
@@ -104,4 +114,6 @@ examples:
       reset-names = "vde", "mc";
       resets = <&rst 61>, <&mem 13>;
       iommus = <&mem 15>;
+      operating-points-v2 = <&dvfs_opp_table>;
+      power-domains = <&domain>;
     };