compatible = "allwinner,sun8i-h3-de2-clk";
};
+&mbus {
+ compatible = "allwinner,sun8i-h3-mbus";
+};
+
&mmc0 {
compatible = "allwinner,sun7i-a20-mmc";
clocks = <&ccu CLK_BUS_MMC0>,
};
mbus: dram-controller@1c62000 {
- compatible = "allwinner,sun8i-h3-mbus";
- reg = <0x01c62000 0x1000>;
- clocks = <&ccu CLK_MBUS>;
+ /* compatible is in per SoC .dtsi file */
+ reg = <0x01c62000 0x1000>,
+ <0x01c63000 0x1000>;
+ reg-names = "mbus", "dram";
+ clocks = <&ccu CLK_MBUS>,
+ <&ccu CLK_DRAM>,
+ <&ccu CLK_BUS_DRAM>;
+ clock-names = "mbus", "dram", "bus";
#address-cells = <1>;
#size-cells = <1>;
dma-ranges = <0x00000000 0x40000000 0xc0000000>;
compatible = "allwinner,sun50i-h5-de2-clk";
};
+&mbus {
+ compatible = "allwinner,sun50i-h5-mbus";
+};
+
&mmc0 {
compatible = "allwinner,sun50i-h5-mmc",
"allwinner,sun50i-a64-mmc";