ARM: dts: stm32: Add Ethernet support on stm32mp1
authorChristophe Roullier <christophe.roullier@st.com>
Fri, 17 May 2019 13:08:45 +0000 (15:08 +0200)
committerPatrice Chotard <patrice.chotard@st.com>
Thu, 6 Jun 2019 15:40:19 +0000 (17:40 +0200)
This patch add Ethernet support on stm32mp157 eval board

Signed-off-by: Christophe Roullier <christophe.roullier@st.com>
arch/arm/dts/stm32mp157-pinctrl.dtsi
arch/arm/dts/stm32mp157c-ev1.dts
arch/arm/dts/stm32mp157c.dtsi

index b41c2b4..4c424c4 100644 (file)
                                                 <STM32_PINMUX('C', 2, AF11)>, /* ETH_RGMII_TXD2 */
                                                 <STM32_PINMUX('E', 2, AF11)>, /* ETH_RGMII_TXD3 */
                                                 <STM32_PINMUX('B', 11, AF11)>, /* ETH_RGMII_TX_CTL */
-                                                <STM32_PINMUX('A', 2, AF11)>, /* ETH_MDIO */
                                                 <STM32_PINMUX('C', 1, AF11)>; /* ETH_MDC */
                                        bias-disable;
                                        drive-push-pull;
-                                       slew-rate = <3>;
+                                       slew-rate = <2>;
                                };
                                pins2 {
+                                       pinmux = <STM32_PINMUX('A', 2, AF11)>; /* ETH_MDIO */
+                                       bias-disable;
+                                       drive-push-pull;
+                                       slew-rate = <0>;
+                               };
+                               pins3 {
                                        pinmux = <STM32_PINMUX('C', 4, AF11)>, /* ETH_RGMII_RXD0 */
                                                 <STM32_PINMUX('C', 5, AF11)>, /* ETH_RGMII_RXD1 */
                                                 <STM32_PINMUX('B', 0, AF11)>, /* ETH_RGMII_RXD2 */
index 69980ca..663e52a 100644 (file)
@@ -78,7 +78,7 @@
        pinctrl-0 = <&ethernet0_rgmii_pins_a>;
        pinctrl-1 = <&ethernet0_rgmii_pins_sleep_a>;
        pinctrl-names = "default", "sleep";
-       phy-mode = "rgmii";
+       phy-mode = "rgmii-id";
        max-speed = <1000>;
        phy-handle = <&phy0>;
 
index a0b297e..7321585 100644 (file)
                        compatible = "st,stm32mp1-dwmac", "snps,dwmac-4.20a";
                        reg = <0x5800a000 0x2000>;
                        reg-names = "stmmaceth";
-                       interrupts-extended = <&intc GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>;
-                       interrupt-names = "macirq";
+                       interrupts-extended =
+                               <&intc GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>,
+                               <&intc GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>,
+                               <&exti 70 1>;
+                       interrupt-names = "macirq",
+                                         "eth_wake_irq",
+                                         "stm32_pwr_wakeup";
                        clock-names = "stmmaceth",
                                      "mac-clk-tx",
                                      "mac-clk-rx",
-                                     "ethstp",
-                                     "syscfg-clk";
+                                     "ethstp";
                        clocks = <&rcc ETHMAC>,
                                 <&rcc ETHTX>,
                                 <&rcc ETHRX>,
-                                <&rcc ETHSTP>,
-                                <&rcc SYSCFG>;
+                                <&rcc ETHSTP>;
                        st,syscon = <&syscfg 0x4>;
                        snps,mixed-burst;
                        snps,pbl = <2>;
+                       snps,en-tx-lpi-clockgating;
                        snps,axi-config = <&stmmac_axi_config_0>;
                        snps,tso;
                        status = "disabled";