gas/ARM: Misses deprecated IT instruction warning for ARMv8

  Add sp increment and decrement to ARMv8 IT block deprecate
  pattern.

  gas/
    * config/tc-arm.c (depr_it_insns): New check for inc/dec sp.

  gas/testsuite/
    * gas/arm/armv8-a-it-bad.s: New check for inc/dec sp.
    * gas/arm/armv8-a-it-bad.l: Likewise.

diff --git a/gas/ChangeLog b/gas/ChangeLog
index 9e3a320..34fd665 100644 (file)
--- a/gas/ChangeLog
+++ b/gas/ChangeLog
@@ -1,3 +1,7 @@
+2014-06-17 Jiong Wang <jiong.wang@arm.com>
+
+       * config/tc-arm.c (depr_it_insns): New check for inc/dec sp.
+
 2014-06-17  Hans-Peter Nilsson  <hp@axis.com>
 
        * config/tc-cris.c (cris_bad): New function.

diff --git a/gas/config/tc-arm.c b/gas/config/tc-arm.c
index fc86db4..ce0532b 100644 (file)
--- a/gas/config/tc-arm.c
+++ b/gas/config/tc-arm.c
@@ -17266,6 +17266,9 @@ static const struct depr_insn_mask depr_it_insns[] = {
   { 0x4800, 0xf800, N_("Literal loads") },
   { 0x4478, 0xf478, N_("Hi-register ADD, MOV, CMP, BX, BLX using pc") },
   { 0x4487, 0xfc87, N_("Hi-register ADD, MOV, CMP using pc") },
+  /* NOTE: 0x00dd is not the real encoding, instead, it is the 'tvalue'
+     field in asm_opcode. 'tvalue' is used at the stage this check happen.  */
+  { 0x00dd, 0x7fff, N_("ADD/SUB sp, sp #imm") },
   { 0, 0, NULL }
 };
 

diff --git a/gas/testsuite/ChangeLog b/gas/testsuite/ChangeLog
index b2d7af9..87b9823 100644 (file)
--- a/gas/testsuite/ChangeLog
+++ b/gas/testsuite/ChangeLog
@@ -1,3 +1,9 @@
+2014-06-17  Jiong Wang  <jiong.wang@arm.com>
+
+       * gas/arm/armv8-a-it-bad.s: New check for deprecated sp_inc/dec within
+       IT block for ARMv8.
+       * gas/arm/armv8-a-it-bad.l: Likewise.
+
 2014-06-17  Hans-Peter Nilsson  <hp@axis.com>
 
        * gas/cris/range-err-3.s: New test.

diff --git a/gas/testsuite/gas/arm/armv8-a-it-bad.l b/gas/testsuite/gas/arm/armv8-a-it-bad.l
index e3a5971..282216e 100644 (file)
--- a/gas/testsuite/gas/arm/armv8-a-it-bad.l
+++ b/gas/testsuite/gas/arm/armv8-a-it-bad.l
@@ -12,3 +12,7 @@
 .*:55: Error: r15 not allowed here -- `addeq r0,pc,pc'
 .*:58: Warning: IT blocks containing 16-bit Thumb instructions of the following class are deprecated in ARMv8: Short branches, Undefined, SVC, LDM/STM
 .*:58: Error: r15 not allowed here -- `addeq pc,r0,r0'
+.*:61: Warning: IT blocks containing 16-bit Thumb instructions of the following class are deprecated in ARMv8: ADD/SUB sp, sp #imm
+.*:65: Warning: IT blocks containing 16-bit Thumb instructions of the following class are deprecated in ARMv8: ADD/SUB sp, sp #imm
+.*:68: Warning: IT blocks containing 16-bit Thumb instructions of the following class are deprecated in ARMv8: ADD/SUB sp, sp #imm
+.*:72: Warning: IT blocks containing 16-bit Thumb instructions of the following class are deprecated in ARMv8: ADD/SUB sp, sp #imm

diff --git a/gas/testsuite/gas/arm/armv8-a-it-bad.s b/gas/testsuite/gas/arm/armv8-a-it-bad.s
index 42f2b86..d1bc07a 100644 (file)
--- a/gas/testsuite/gas/arm/armv8-a-it-bad.s
+++ b/gas/testsuite/gas/arm/armv8-a-it-bad.s
@@ -56,3 +56,17 @@ addeq r0, pc, pc
 
 it eq
 addeq pc, r0, r0
+
+it eq
+addeq sp, sp, #12
+
+@ Misaligned immediate.
+it eq
+addeq sp, sp, #3
+
+it eq
+subeq sp, sp, #12
+
+@ Misaligned immediate.
+it eq
+subeq sp, sp, #3