drm/amdgpu: initialize IP offset for navy_flounder
authorJiansong Chen <Jiansong.Chen@amd.com>
Tue, 11 Feb 2020 06:00:39 +0000 (14:00 +0800)
committerAlex Deucher <alexander.deucher@amd.com>
Wed, 15 Jul 2020 16:46:07 +0000 (12:46 -0400)
since navy_flounder has the same ip offset with sienna_cichlid,
follow sienna_cichlid setting for the moment.

Signed-off-by: Jiansong Chen <Jiansong.Chen@amd.com>
Reviewed-by: Tao Zhou <Tao.Zhou1@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/amdgpu/nv.c

index 665fb4c..b78b9ba 100644 (file)
@@ -424,6 +424,7 @@ legacy_init:
                navi12_reg_base_init(adev);
                break;
        case CHIP_SIENNA_CICHLID:
+       case CHIP_NAVY_FLOUNDER:
                sienna_cichlid_reg_base_init(adev);
                break;
        default: