mpc8379erdb: enable DM_USB DM_PCI DM_ETH
authorSinan Akman <sinan@writeme.com>
Tue, 11 May 2021 18:18:02 +0000 (14:18 -0400)
committerTom Rini <trini@konsulko.com>
Tue, 6 Jul 2021 18:07:36 +0000 (14:07 -0400)
Signed-off-by: Sinan Akman <sinan@writeme.com>
arch/powerpc/cpu/mpc83xx/pci.c
arch/powerpc/dts/mpc8379erdb.dts
board/freescale/mpc837xerdb/mpc837xerdb.c
configs/MPC837XERDB_defconfig

index 5c289d0..507ab34 100644 (file)
@@ -27,6 +27,7 @@ DECLARE_GLOBAL_DATA_PTR;
 static struct pci_controller pci_hose[MAX_BUSES];
 static int pci_num_buses;
 
+#if !defined(CONFIG_DM_PCI)
 static void pci_init_bus(int bus, struct pci_region *reg)
 {
        volatile immap_t *immr = (volatile immap_t *)CONFIG_SYS_IMMR;
@@ -184,6 +185,7 @@ void mpc83xx_pcislave_unlock(int bus)
        hose->last_busno = pci_hose_scan(hose);
 }
 #endif
+#endif /* CONFIG_DM_PCI */
 
 #if defined(CONFIG_OF_LIBFDT)
 void ft_pci_setup(void *blob, struct bd_info *bd)
index b1881b1..2e7c8f1 100644 (file)
                        device_type = "ipic";
                };
 
+               usb@23000 {
+                       compatible = "fsl-usb2-dr";
+                       reg = <0x23000 0x1000>;
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       interrupt-parent = <&ipic>;
+                       interrupts = <38 0x8>;
+                       phy_type = "ulpi";
+               };
+
+               enet0: ethernet@24000 {
+                       #address-cells = <1>;
+                       #size-cells = <1>;
+                       cell-index = <0>;
+                       device_type = "network";
+                       model = "eTSEC";
+                       compatible = "fsl,etsec2";
+                       reg = <0x24000 0x1000>;
+                       ranges = <0x0 0x24000 0x1000>;
+                       local-mac-address = [ 00 00 00 00 00 00 ];
+                       interrupts = <32 0x8 33 0x8 34 0x8>;
+                       phy-connection-type = "mii";
+                       interrupt-parent = <&ipic>;
+                       fixed-link = <1 0 1000 0 0>;
+                       phy-handle = <&phy>;
+                       fsl,magic-packet;
+
+                       mdio@520 {
+                               #address-cells = <1>;
+                               #size-cells = <0>;
+                               compatible = "fsl,etsec2-mdio";
+                               reg = <0x520 0x20>;
+
+                               phy: ethernet-phy@2 {
+                                       interrupt-parent = <&ipic>;
+                                       interrupts = <17 0x8>;
+                                       reg = <0x2>;
+                                       device_type = "ethernet-phy";
+                               };
+                       };
+               };
+
+               pci0: pci@e0008300 {
+                       #address-cells = <3>;
+                       #size-cells = <2>;
+                       #interrupt-cells = <1>;
+                       device_type = "pci";
+                       reg = <0x0 0xe0008300 0x0 0x00000fff>;
+                       compatible = "fsl,mpc837x-pci";
+                       clock-frequency = <0>;
+               };
+
        };
 
 };
index 624e92e..66b3d9a 100644 (file)
@@ -176,7 +176,7 @@ int board_early_init_f(void)
 }
 
 #ifdef CONFIG_FSL_ESDHC
-#if !(CONFIG_IS_ENABLED(DM_MMC))
+#if !(CONFIG_IS_ENABLED(DM_MMC) || CONFIG_IS_ENABLED(DM_USB))
 int board_mmc_init(struct bd_info *bd)
 {
        struct immap __iomem *im = (struct immap __iomem *)CONFIG_SYS_IMMR;
@@ -217,6 +217,15 @@ int misc_init_r(void)
        return rc;
 }
 
+int board_late_init(void)
+{
+       volatile immap_t *immap = (immap_t *) CONFIG_SYS_IMMR;
+#ifdef CONFIG_USB
+       clrsetbits_be32(&immap->sysconf.sicrl, SICRL_USB_A, 0x40000000);
+#endif
+       return 0;
+}
+
 #if defined(CONFIG_OF_BOARD_SETUP)
 
 int ft_board_setup(void *blob, struct bd_info *bd)
index 003ebd8..446d594 100644 (file)
@@ -147,7 +147,9 @@ CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_SYS_EXTRA_OPTIONS="PCIE"
 CONFIG_BOOTDELAY=6
+CONFIG_BOARD_LATE_INIT=y
 CONFIG_MISC_INIT_R=y
+CONFIG_PCI_INIT_R=y
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_IMLS=y
 CONFIG_CMD_I2C=y
@@ -172,16 +174,14 @@ CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
 CONFIG_SYS_FLASH_PROTECTION=y
 CONFIG_SYS_FLASH_CFI=y
-CONFIG_PHY_ATHEROS=y
-CONFIG_PHY_BROADCOM=y
-CONFIG_PHY_DAVICOM=y
-CONFIG_PHY_LXT=y
-CONFIG_PHY_MARVELL=y
-CONFIG_PHY_NATSEMI=y
-CONFIG_PHY_REALTEK=y
-CONFIG_PHY_SMSC=y
-CONFIG_PHY_VITESSE=y
+CONFIG_DM_ETH=y
+CONFIG_DM_MDIO=y
+CONFIG_DM_ETH_PHY=y
+CONFIG_RGMII=y
+CONFIG_MII=y
 CONFIG_TSEC_ENET=y
+CONFIG_DM_PCI=y
 CONFIG_SYS_NS16550=y
 CONFIG_USB=y
+CONFIG_DM_USB=y
 CONFIG_USB_EHCI_HCD=y