#include <s5pc100.h>
#ifdef CONFIG_SERIAL0
-#define UART_NR S3C64XX_UART0
+#define UART_NR S5PC1XX_UART0
#elif defined(CONFIG_SERIAL1)
-#define UART_NR S3C64XX_UART1
+#define UART_NR S5PC1XX_UART1
#elif defined(CONFIG_SERIAL2)
-#define UART_NR S3C64XX_UART2
+#define UART_NR S5PC1XX_UART2
#elif defined(CONFIG_SERIAL3)
-#define UART_NR S3C64XX_UART3
+#define UART_NR S5PC1XX_UART3
#else
#error "Bad: you didn't configure serial ..."
#endif
#define barrier() asm volatile("" ::: "memory")
/*
- * The coefficient, used to calculate the baudrate on S3C6400 UARTs is
+ * The coefficient, used to calculate the baudrate on S5PC1XX UARTs is
* calculated as
* C = UBRDIV * 16 + number_of_set_bits_in_UDIVSLOT
* however, section 31.6.11 of the datasheet doesn't recomment using 1 for 1,
void serial_setbrg(void)
{
DECLARE_GLOBAL_DATA_PTR;
- s3c64xx_uart *const uart = s3c64xx_get_base_uart(UART_NR);
+ s5pc1xx_uart *const uart = s5pc1xx_get_base_uart(UART_NR);
u32 pclk = get_PCLK();
u32 baudrate = gd->baudrate;
int i;
*/
int serial_init(void)
{
- s3c64xx_uart *const uart = s3c64xx_get_base_uart(UART_NR);
+ s5pc1xx_uart *const uart = s5pc1xx_get_base_uart(UART_NR);
/* reset and enable FIFOs, set triggers to the maximum */
uart->UFCON = 0;
*/
int serial_getc(void)
{
- s3c64xx_uart *const uart = s3c64xx_get_base_uart(UART_NR);
+ s5pc1xx_uart *const uart = s5pc1xx_get_base_uart(UART_NR);
/* wait for character to arrive */
while (!(uart->UTRSTAT & 0x1));
*/
void serial_putc(const char c)
{
- s3c64xx_uart *const uart = s3c64xx_get_base_uart(UART_NR);
+ s5pc1xx_uart *const uart = s5pc1xx_get_base_uart(UART_NR);
#ifdef CONFIG_MODEM_SUPPORT
if (be_quiet)
*/
int serial_tstc(void)
{
- s3c64xx_uart *const uart = s3c64xx_get_base_uart(UART_NR);
+ s5pc1xx_uart *const uart = s5pc1xx_get_base_uart(UART_NR);
return uart->UTRSTAT & 0x1;
}
#define DMC_DDR_USER_CONFIG 1
#ifndef __ASSEMBLY__
-enum s3c64xx_uarts_nr {
- S3C64XX_UART0,
- S3C64XX_UART1,
- S3C64XX_UART2,
- S3C64XX_UART3,
+enum s5pc1xx_uarts_nr {
+ S5PC1XX_UART0,
+ S5PC1XX_UART1,
+ S5PC1XX_UART2,
+ S5PC1XX_UART3,
};
-#include "s3c64x0.h"
+#include "s5pc1x0.h"
-static inline s3c64xx_uart *s3c64xx_get_base_uart(enum s3c64xx_uarts_nr nr)
+static inline s5pc1xx_uart *s5pc1xx_get_base_uart(enum s5pc1xx_uarts_nr nr)
{
- return (s3c64xx_uart *)(ELFIN_UART_BASE + (nr * 0x400));
+ return (s5pc1xx_uart *)(ELFIN_UART_BASE + (nr * 0x400));
}
#endif
-#endif /*__S3C6400_H__*/
+#endif
* common stuff for SAMSUNG S3C64XX SoC
************************************************/
-#ifndef __S3C64XX_H__
-#define __S3C64XX_H__
+#ifndef __S5PC1XX_H__
+#define __S5PC1XX_H__
#if defined(CONFIG_SYNC_MODE) && defined(CONFIG_S3C6400)
#error CONFIG_SYNC_MODE unavailable on S3C6400, please, fix your configuration!
volatile u8 res2[3];
#endif
volatile u32 UBRDIV;
-} s3c64xx_uart;
+#ifdef __BIG_ENDIAN
+ volatile u8 res3[2];
+ volatile u16 UDIVSLOT;
+#else
+ volatile u16 UDIVSLOT;
+ volatile u8 res3[2];
+#endif
+} s5pc1xx_uart;
/* PWM TIMER (see manual chapter 10) */
typedef struct {
volatile u32 TCNTO4;
} s3c64xx_timers;
-#endif /*__S3C64XX_H__*/
+#endif