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Fix VEX.vvvv encoding for AVX.BlendVariable
author
Fei Peng
<fei.peng@intel.com>
Wed, 11 Jul 2018 22:55:37 +0000
(15:55 -0700)
committer
Tanner Gooding
<tagoo@outlook.com>
Thu, 12 Jul 2018 03:29:05 +0000
(20:29 -0700)
Commit migrated from https://github.com/dotnet/coreclr/commit/
a03b08ab38186db8bb30a412bc73165810140119
src/coreclr/src/jit/emitxarch.cpp
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diff --git
a/src/coreclr/src/jit/emitxarch.cpp
b/src/coreclr/src/jit/emitxarch.cpp
index
7809c50
..
bdbf335
100644
(file)
--- a/
src/coreclr/src/jit/emitxarch.cpp
+++ b/
src/coreclr/src/jit/emitxarch.cpp
@@
-293,6
+293,9
@@
bool emitter::IsDstDstSrcAVXInstruction(instruction ins)
case INS_unpcklps:
case INS_unpckhpd:
case INS_unpcklpd:
+ case INS_vblendvps:
+ case INS_vblendvpd:
+ case INS_vpblendvb:
case INS_vfmadd132pd:
case INS_vfmadd213pd:
case INS_vfmadd231pd:
@@
-9382,7
+9385,8
@@
BYTE* emitter::emitOutputAM(BYTE* dst, instrDesc* id, code_t code, CnsVal* addc)
{
regNumber src1 = id->idReg2();
- if ((id->idInsFmt() != IF_RWR_RRD_ARD) && (id->idInsFmt() != IF_RWR_RRD_ARD_CNS))
+ if ((id->idInsFmt() != IF_RWR_RRD_ARD) && (id->idInsFmt() != IF_RWR_RRD_ARD_CNS) &&
+ (id->idInsFmt() != IF_RWR_RRD_ARD_RRD))
{
src1 = id->idReg1();
}