* config/mips/mips.c (dfhigh, dflow, sfhigh, sflow): Remove.

        (override_options): Do not initialize them.
        (mips_const_double_ok): Allow no fp constants except zero,
        and not even that for mips16.
        (const_float_1_operand): Use dconst1.
        * config/mips/mips.md (movsf, movsf_internal1, movsf_internal2,
        movdf, movdf_internal1, movdf_internal1a, movdf_internal2):
        Don't allow arbitrary constants; fix predicates and C constraint.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@57368 138bc75d-0d04-0410-961f-82ee72b054a4

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 9d5bf6c..0c971ca 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,14 @@
+2002-09-20  Richard Henderson  <rth@redhat.com>
+
+       * config/mips/mips.c (dfhigh, dflow, sfhigh, sflow): Remove.
+       (override_options): Do not initialize them.
+       (mips_const_double_ok): Allow no fp constants except zero,
+       and not even that for mips16.
+       (const_float_1_operand): Use dconst1.
+       * config/mips/mips.md (movsf, movsf_internal1, movsf_internal2,
+       movdf, movdf_internal1, movdf_internal1a, movdf_internal2):
+       Don't allow arbitrary constants; fix predicates and C constraint.
+
 2002-09-20  Neil Booth  <neil@daikokuya.co.uk>
 
        * cppmacro.c: Don't warn about function-like macros without

diff --git a/gcc/config/mips/mips.c b/gcc/config/mips/mips.c
index 192c60b..1d7157d 100644 (file)
--- a/gcc/config/mips/mips.c
+++ b/gcc/config/mips/mips.c
@@ -352,11 +352,6 @@ int mips_split_addresses;
 /* Generating calls to position independent functions?  */
 enum mips_abicalls_type mips_abicalls;
 
-/* High and low marks for floating point values which we will accept
-   as legitimate constants for LEGITIMATE_CONSTANT_P.  These are
-   initialized in override_options.  */
-REAL_VALUE_TYPE dfhigh, dflow, sfhigh, sflow;
-
 /* Mode used for saving/restoring general purpose registers.  */
 static enum machine_mode gpr_mode;
 
@@ -821,37 +816,16 @@ mips_const_double_ok (op, mode)
   if (mode == VOIDmode)
     return 1;
 
+  /* We've no zero register in mips16 mode.  */
+  if (TARGET_MIPS16)
+    return 0;
+
   if (mode != SFmode && mode != DFmode)
     return 0;
 
   if (op == CONST0_RTX (mode))
     return 1;
 
-  /* ??? li.s does not work right with SGI's Irix 6 assembler.  */
-  if (mips_abi != ABI_32 && mips_abi != ABI_O64 && mips_abi != ABI_EABI)
-    return 0;
-
-  REAL_VALUE_FROM_CONST_DOUBLE (d, op);
-
-  if (REAL_VALUE_ISNAN (d))
-    return FALSE;
-
-  if (REAL_VALUE_NEGATIVE (d))
-    d = REAL_VALUE_NEGATE (d);
-
-  if (mode == DFmode)
-    {
-      if (REAL_VALUES_LESS (d, dfhigh)
-         && REAL_VALUES_LESS (dflow, d))
-       return 1;
-    }
-  else
-    {
-      if (REAL_VALUES_LESS (d, sfhigh)
-         && REAL_VALUES_LESS (sflow, d))
-       return 1;
-    }
-
   return 0;
 }
 
@@ -863,9 +837,6 @@ const_float_1_operand (op, mode)
      enum machine_mode mode;
 {
   REAL_VALUE_TYPE d;
-  static REAL_VALUE_TYPE onedf;
-  static REAL_VALUE_TYPE onesf;
-  static int one_initialized;
 
   if (GET_CODE (op) != CONST_DOUBLE
       || mode != GET_MODE (op)
@@ -874,19 +845,7 @@ const_float_1_operand (op, mode)
 
   REAL_VALUE_FROM_CONST_DOUBLE (d, op);
 
-  /* We only initialize these values if we need them, since we will
-     never get called unless mips_isa >= 4.  */
-  if (! one_initialized)
-    {
-      onedf = REAL_VALUE_ATOF ("1.0", DFmode);
-      onesf = REAL_VALUE_ATOF ("1.0", SFmode);
-      one_initialized = 1;
-    }
-
-  if (mode == DFmode)
-    return REAL_VALUES_EQUAL (d, onedf);
-  else
-    return REAL_VALUES_EQUAL (d, onesf);
+  return REAL_VALUES_EQUAL (d, dconst1);
 }
 
 /* Return true if a memory load or store of REG plus OFFSET in MODE
@@ -5310,14 +5269,6 @@ override_options ()
   else
     mips16 = 0;
 
-  /* Initialize the high and low values for legitimate floating point
-     constants.  Rather than trying to get the accuracy down to the
-     last bit, just use approximate ranges.  */
-  dfhigh = REAL_VALUE_ATOF ("1.0e300", DFmode);
-  dflow = REAL_VALUE_ATOF ("1.0e-300", DFmode);
-  sfhigh = REAL_VALUE_ATOF ("1.0e38", SFmode);
-  sflow = REAL_VALUE_ATOF ("1.0e-38", SFmode);
-
   mips_print_operand_punct['?'] = 1;
   mips_print_operand_punct['#'] = 1;
   mips_print_operand_punct['&'] = 1;

diff --git a/gcc/config/mips/mips.md b/gcc/config/mips/mips.md
index f68d454..9d269f5 100644 (file)
--- a/gcc/config/mips/mips.md
+++ b/gcc/config/mips/mips.md
@@ -6402,39 +6402,27 @@ move\\t%0,%z4\\n\\
 {
   if ((reload_in_progress | reload_completed) == 0
       && !register_operand (operands[0], SFmode)
-      && !register_operand (operands[1], SFmode)
-      && (TARGET_MIPS16
-         || ((GET_CODE (operands[1]) != CONST_INT || INTVAL (operands[1]) != 0)
-              && operands[1] != CONST0_RTX (SFmode))))
-    {
-      rtx temp = force_reg (SFmode, operands[1]);
-      emit_move_insn (operands[0], temp);
-      DONE;
-    }
+      && !nonmemory_operand (operands[1], SFmode))
+    operands[1] = force_reg (SFmode, operands[1]);
 }")
 
 (define_insn "movsf_internal1"
   [(set (match_operand:SF 0 "nonimmediate_operand" "=f,f,f,f,R,m,*f,*d,*d,*d,*d,*R,*m")
-       (match_operand:SF 1 "general_operand" "f,G,R,Fm,fG,fG,*d,*f,*G*d,*R,*F*m,*d,*d"))]
+       (match_operand:SF 1 "general_operand" "f,G,R,m,fG,fG,*d,*f,*G*d,*R,*m,*d,*d"))]
   "TARGET_HARD_FLOAT
    && (register_operand (operands[0], SFmode)
-       || register_operand (operands[1], SFmode)
-       || (GET_CODE (operands[1]) == CONST_INT && INTVAL (operands[1]) == 0)
-       || operands[1] == CONST0_RTX (SFmode))"
+       || nonmemory_operand (operands[1], SFmode))"
   "* return mips_move_1word (operands, insn, FALSE);"
   [(set_attr "type"    "move,xfer,load,load,store,store,xfer,xfer,move,load,load,store,store")
    (set_attr "mode"    "SF")
    (set_attr "length"  "4,4,4,8,4,8,4,4,4,4,8,4,8")])
 
-
 (define_insn "movsf_internal2"
   [(set (match_operand:SF 0 "nonimmediate_operand" "=d,d,d,R,m")
-       (match_operand:SF 1 "general_operand" "      Gd,R,Fm,d,d"))]
+       (match_operand:SF 1 "general_operand" "      Gd,R,m,d,d"))]
   "TARGET_SOFT_FLOAT && !TARGET_MIPS16
    && (register_operand (operands[0], SFmode)
-       || register_operand (operands[1], SFmode)
-       || (GET_CODE (operands[1]) == CONST_INT && INTVAL (operands[1]) == 0)
-       || operands[1] == CONST0_RTX (SFmode))"
+       || nonmemory_operand (operands[1], SFmode))"
   "* return mips_move_1word (operands, insn, FALSE);"
   [(set_attr "type"    "move,load,load,store,store")
    (set_attr "mode"    "SF")
@@ -6442,7 +6430,7 @@ move\\t%0,%z4\\n\\
 
 (define_insn ""
   [(set (match_operand:SF 0 "nonimmediate_operand" "=d,y,d,d,d,R,m")
-       (match_operand:SF 1 "general_operand"      "d,d,y,R,Fm,d,d"))]
+       (match_operand:SF 1 "nonimmediate_operand" "d,d,y,R,m,d,d"))]
   "TARGET_MIPS16
    && (register_operand (operands[0], SFmode)
        || register_operand (operands[1], SFmode))"
@@ -6462,55 +6450,40 @@ move\\t%0,%z4\\n\\
 {
   if ((reload_in_progress | reload_completed) == 0
       && !register_operand (operands[0], DFmode)
-      && !register_operand (operands[1], DFmode)
-      && (TARGET_MIPS16
-         || ((GET_CODE (operands[1]) != CONST_INT || INTVAL (operands[1]) != 0)
-              && operands[1] != CONST0_RTX (DFmode))))
-    {
-      rtx temp = force_reg (DFmode, operands[1]);
-      emit_move_insn (operands[0], temp);
-      DONE;
-    }
+      && !nonmemory_operand (operands[1], DFmode))
+    operands[1] = force_reg (DFmode, operands[1]);
 }")
 
 (define_insn "movdf_internal1"
-  [(set (match_operand:DF 0 "nonimmediate_operand" "=f,f,f,R,To,f,*f,*d,*d,*d,*d,*R,*T")
-       (match_operand:DF 1 "general_operand" "f,R,To,fG,fG,F,*d,*f,*d*G,*R,*T*F,*d,*d"))]
+  [(set (match_operand:DF 0 "nonimmediate_operand" "=f,f,f,R,To,*f,*d,*d,*d,*d,*R,*T")
+       (match_operand:DF 1 "general_operand" "f,R,To,fG,fG,*d,*f,*d*G,*R,*T,*d,*d"))]
   "TARGET_HARD_FLOAT && !(TARGET_FLOAT64 && !TARGET_64BIT)
    && TARGET_DOUBLE_FLOAT
    && (register_operand (operands[0], DFmode)
-       || register_operand (operands[1], DFmode)
-       || (GET_CODE (operands[1]) == CONST_INT && INTVAL (operands[1]) == 0)
-       || operands[1] == CONST0_RTX (DFmode))"
+       || nonmemory_operand (operands[1], DFmode))"
   "* return mips_move_2words (operands, insn); "
-  [(set_attr "type"    "move,load,load,store,store,load,xfer,xfer,move,load,load,store,store")
+  [(set_attr "type"    "move,load,load,store,store,xfer,xfer,move,load,load,store,store")
    (set_attr "mode"    "DF")
-   (set_attr "length"  "4,8,16,8,16,16,8,8,8,8,16,8,16")])
+   (set_attr "length"  "4,8,16,8,16,8,8,8,8,16,8,16")])
 
 (define_insn "movdf_internal1a"
-  [(set (match_operand:DF 0 "nonimmediate_operand" "=f,f,R,R,To,To,*d,*d,*d,*To,*R,*d")
-       (match_operand:DF 1 "general_operand"      " f,To,f,G,f,G,*F,*To,*R,*d,*d,*d"))]
+  [(set (match_operand:DF 0 "nonimmediate_operand" "=f,f,R,R,To,To,*d,*d,*To,*R,*d")
+       (match_operand:DF 1 "general_operand"      " f,To,f,G,f,G,*To,*R,*d,*d,*d"))]
   "TARGET_HARD_FLOAT && (TARGET_FLOAT64 && !TARGET_64BIT)
    && TARGET_DOUBLE_FLOAT
    && (register_operand (operands[0], DFmode)
-       || register_operand (operands[1], DFmode)
-       || (GET_CODE (operands [0]) == MEM
-          && ((GET_CODE (operands[1]) == CONST_INT
-               && INTVAL (operands[1]) == 0)
-              || operands[1] == CONST0_RTX (DFmode))))"
+       || nonmemory_operand (operands[1], DFmode))"
   "* return mips_move_2words (operands, insn); "
-  [(set_attr "type"    "move,load,store,store,store,store,load,load,load,store,store,move")
+  [(set_attr "type"    "move,load,store,store,store,store,load,load,store,store,move")
    (set_attr "mode"    "DF")
-   (set_attr "length"  "4,8,4,4,8,8,8,8,4,8,4,4")])
+   (set_attr "length"  "4,8,4,4,8,8,8,4,8,4,4")])
 
 (define_insn "movdf_internal2"
   [(set (match_operand:DF 0 "nonimmediate_operand" "=d,d,d,R,To,d,f,f")
-       (match_operand:DF 1 "general_operand" "dG,R,ToF,d,d,f,d,f"))]
+       (match_operand:DF 1 "general_operand" "dG,R,To,d,d,f,d,f"))]
   "(TARGET_SOFT_FLOAT || TARGET_SINGLE_FLOAT) && !TARGET_MIPS16
    && (register_operand (operands[0], DFmode)
-       || register_operand (operands[1], DFmode)
-       || (GET_CODE (operands[1]) == CONST_INT && INTVAL (operands[1]) == 0)
-       || operands[1] == CONST0_RTX (DFmode))"
+       || nonmemory_operand (operands[1], DFmode))"
   "* return mips_move_2words (operands, insn); "
   [(set_attr "type"    "move,load,load,store,store,xfer,load,move")
    (set_attr "mode"    "DF")
@@ -6518,7 +6491,7 @@ move\\t%0,%z4\\n\\
 
 (define_insn ""
   [(set (match_operand:DF 0 "nonimmediate_operand" "=d,y,d,d,d,R,To")
-       (match_operand:DF 1 "general_operand" "d,d,y,R,ToF,d,d"))]
+       (match_operand:DF 1 "nonimmediate_operand" "d,d,y,R,To,d,d"))]
   "TARGET_MIPS16
    && (register_operand (operands[0], DFmode)
        || register_operand (operands[1], DFmode))"