PCI: pci-bridge-emul: Fix PCIe bit conflicts
authorJon Derrick <jonathan.derrick@intel.com>
Mon, 11 May 2020 16:21:14 +0000 (12:21 -0400)
committerLorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Fri, 22 May 2020 11:39:35 +0000 (12:39 +0100)
This patch fixes two bit conflicts in the pci-bridge-emul driver:

1. Bit 3 of Device Status (19 of Device Control) is marked as both
   Write-1-to-Clear and Read-Only. It should be Write-1-to-Clear.
   The Read-Only and Reserved bitmasks are shifted by 1 bit due to this
   error.

2. Bit 12 of Slot Control is marked as both Read-Write and Reserved.
   It should be Read-Write.

Link: https://lore.kernel.org/r/20200511162117.6674-2-jonathan.derrick@intel.com
Signed-off-by: Jon Derrick <jonathan.derrick@intel.com>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Acked-by: Rob Herring <robh@kernel.org>
drivers/pci/pci-bridge-emul.c

index 4f4f54b..faa4146 100644 (file)
@@ -185,8 +185,8 @@ static const struct pci_bridge_reg_behavior pcie_cap_regs_behavior[] = {
                 * RO, the rest is reserved
                 */
                .w1c = GENMASK(19, 16),
-               .ro = GENMASK(20, 19),
-               .rsvd = GENMASK(31, 21),
+               .ro = GENMASK(21, 20),
+               .rsvd = GENMASK(31, 22),
        },
 
        [PCI_EXP_LNKCAP / 4] = {
@@ -226,7 +226,7 @@ static const struct pci_bridge_reg_behavior pcie_cap_regs_behavior[] = {
                        PCI_EXP_SLTSTA_CC | PCI_EXP_SLTSTA_DLLSC) << 16,
                .ro = (PCI_EXP_SLTSTA_MRLSS | PCI_EXP_SLTSTA_PDS |
                       PCI_EXP_SLTSTA_EIS) << 16,
-               .rsvd = GENMASK(15, 12) | (GENMASK(15, 9) << 16),
+               .rsvd = GENMASK(15, 13) | (GENMASK(15, 9) << 16),
        },
 
        [PCI_EXP_RTCTL / 4] = {