drm/amd: Use `amdgpu_ucode_*` helpers for GFX11
authorMario Limonciello <mario.limonciello@amd.com>
Tue, 3 Jan 2023 20:30:53 +0000 (14:30 -0600)
committerAlex Deucher <alexander.deucher@amd.com>
Mon, 9 Jan 2023 22:02:18 +0000 (17:02 -0500)
The `amdgpu_ucode_request` helper will ensure that the return code for
missing firmware is -ENODEV so that early_init can fail.

The `amdgpu_ucode_release` helper will provide symmetery on unload.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Lijo Lazar <lijo.lazar@amd.com>
Signed-off-by: Mario Limonciello <mario.limonciello@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c
drivers/gpu/drm/amd/amdgpu/imu_v11_0.c

index 259ebf0..a582275 100644 (file)
@@ -431,18 +431,39 @@ err1:
 
 static void gfx_v11_0_free_microcode(struct amdgpu_device *adev)
 {
-       release_firmware(adev->gfx.pfp_fw);
-       adev->gfx.pfp_fw = NULL;
-       release_firmware(adev->gfx.me_fw);
-       adev->gfx.me_fw = NULL;
-       release_firmware(adev->gfx.rlc_fw);
-       adev->gfx.rlc_fw = NULL;
-       release_firmware(adev->gfx.mec_fw);
-       adev->gfx.mec_fw = NULL;
+       amdgpu_ucode_release(&adev->gfx.pfp_fw);
+       amdgpu_ucode_release(&adev->gfx.me_fw);
+       amdgpu_ucode_release(&adev->gfx.rlc_fw);
+       amdgpu_ucode_release(&adev->gfx.mec_fw);
 
        kfree(adev->gfx.rlc.register_list_format);
 }
 
+static int gfx_v11_0_init_toc_microcode(struct amdgpu_device *adev)
+{
+       const struct psp_firmware_header_v1_0 *toc_hdr;
+       int err = 0;
+       char fw_name[40];
+       char ucode_prefix[30];
+
+       amdgpu_ucode_ip_version_decode(adev, GC_HWIP, ucode_prefix, sizeof(ucode_prefix));
+       snprintf(fw_name, sizeof(fw_name), "amdgpu/%s_toc.bin", ucode_prefix);
+       err = amdgpu_ucode_request(adev, &adev->psp.toc_fw, fw_name);
+       if (err)
+               goto out;
+
+       toc_hdr = (const struct psp_firmware_header_v1_0 *)adev->psp.toc_fw->data;
+       adev->psp.toc.fw_version = le32_to_cpu(toc_hdr->header.ucode_version);
+       adev->psp.toc.feature_version = le32_to_cpu(toc_hdr->sos.fw_version);
+       adev->psp.toc.size_bytes = le32_to_cpu(toc_hdr->header.ucode_size_bytes);
+       adev->psp.toc.start_addr = (uint8_t *)toc_hdr +
+                               le32_to_cpu(toc_hdr->header.ucode_array_offset_bytes);
+       return 0;
+out:
+       amdgpu_ucode_release(&adev->psp.toc_fw);
+       return err;
+}
+
 static int gfx_v11_0_init_microcode(struct amdgpu_device *adev)
 {
        char fw_name[40];
@@ -457,10 +478,7 @@ static int gfx_v11_0_init_microcode(struct amdgpu_device *adev)
        amdgpu_ucode_ip_version_decode(adev, GC_HWIP, ucode_prefix, sizeof(ucode_prefix));
 
        snprintf(fw_name, sizeof(fw_name), "amdgpu/%s_pfp.bin", ucode_prefix);
-       err = request_firmware(&adev->gfx.pfp_fw, fw_name, adev->dev);
-       if (err)
-               goto out;
-       err = amdgpu_ucode_validate(adev->gfx.pfp_fw);
+       err = amdgpu_ucode_request(adev, &adev->gfx.pfp_fw, fw_name);
        if (err)
                goto out;
        /* check pfp fw hdr version to decide if enable rs64 for gfx11.*/
@@ -477,10 +495,7 @@ static int gfx_v11_0_init_microcode(struct amdgpu_device *adev)
        }
 
        snprintf(fw_name, sizeof(fw_name), "amdgpu/%s_me.bin", ucode_prefix);
-       err = request_firmware(&adev->gfx.me_fw, fw_name, adev->dev);
-       if (err)
-               goto out;
-       err = amdgpu_ucode_validate(adev->gfx.me_fw);
+       err = amdgpu_ucode_request(adev, &adev->gfx.me_fw, fw_name);
        if (err)
                goto out;
        if (adev->gfx.rs64_enable) {
@@ -493,10 +508,7 @@ static int gfx_v11_0_init_microcode(struct amdgpu_device *adev)
 
        if (!amdgpu_sriov_vf(adev)) {
                snprintf(fw_name, sizeof(fw_name), "amdgpu/%s_rlc.bin", ucode_prefix);
-               err = request_firmware(&adev->gfx.rlc_fw, fw_name, adev->dev);
-               if (err)
-                       goto out;
-               err = amdgpu_ucode_validate(adev->gfx.rlc_fw);
+               err = amdgpu_ucode_request(adev, &adev->gfx.rlc_fw, fw_name);
                if (err)
                        goto out;
                rlc_hdr = (const struct rlc_firmware_header_v2_0 *)adev->gfx.rlc_fw->data;
@@ -508,10 +520,7 @@ static int gfx_v11_0_init_microcode(struct amdgpu_device *adev)
        }
 
        snprintf(fw_name, sizeof(fw_name), "amdgpu/%s_mec.bin", ucode_prefix);
-       err = request_firmware(&adev->gfx.mec_fw, fw_name, adev->dev);
-       if (err)
-               goto out;
-       err = amdgpu_ucode_validate(adev->gfx.mec_fw);
+       err = amdgpu_ucode_request(adev, &adev->gfx.mec_fw, fw_name);
        if (err)
                goto out;
        if (adev->gfx.rs64_enable) {
@@ -530,54 +539,15 @@ static int gfx_v11_0_init_microcode(struct amdgpu_device *adev)
 
 out:
        if (err) {
-               dev_err(adev->dev,
-                       "gfx11: Failed to init firmware \"%s\"\n",
-                       fw_name);
-               release_firmware(adev->gfx.pfp_fw);
-               adev->gfx.pfp_fw = NULL;
-               release_firmware(adev->gfx.me_fw);
-               adev->gfx.me_fw = NULL;
-               release_firmware(adev->gfx.rlc_fw);
-               adev->gfx.rlc_fw = NULL;
-               release_firmware(adev->gfx.mec_fw);
-               adev->gfx.mec_fw = NULL;
+               amdgpu_ucode_release(&adev->gfx.pfp_fw);
+               amdgpu_ucode_release(&adev->gfx.me_fw);
+               amdgpu_ucode_release(&adev->gfx.rlc_fw);
+               amdgpu_ucode_release(&adev->gfx.mec_fw);
        }
 
        return err;
 }
 
-static int gfx_v11_0_init_toc_microcode(struct amdgpu_device *adev)
-{
-       const struct psp_firmware_header_v1_0 *toc_hdr;
-       int err = 0;
-       char fw_name[40];
-       char ucode_prefix[30];
-
-       amdgpu_ucode_ip_version_decode(adev, GC_HWIP, ucode_prefix, sizeof(ucode_prefix));
-
-       snprintf(fw_name, sizeof(fw_name), "amdgpu/%s_toc.bin", ucode_prefix);
-       err = request_firmware(&adev->psp.toc_fw, fw_name, adev->dev);
-       if (err)
-               goto out;
-
-       err = amdgpu_ucode_validate(adev->psp.toc_fw);
-       if (err)
-               goto out;
-
-       toc_hdr = (const struct psp_firmware_header_v1_0 *)adev->psp.toc_fw->data;
-       adev->psp.toc.fw_version = le32_to_cpu(toc_hdr->header.ucode_version);
-       adev->psp.toc.feature_version = le32_to_cpu(toc_hdr->sos.fw_version);
-       adev->psp.toc.size_bytes = le32_to_cpu(toc_hdr->header.ucode_size_bytes);
-       adev->psp.toc.start_addr = (uint8_t *)toc_hdr +
-                               le32_to_cpu(toc_hdr->header.ucode_array_offset_bytes);
-       return 0;
-out:
-       dev_err(adev->dev, "Failed to load TOC microcode\n");
-       release_firmware(adev->psp.toc_fw);
-       adev->psp.toc_fw = NULL;
-       return err;
-}
-
 static u32 gfx_v11_0_get_csb_size(struct amdgpu_device *adev)
 {
        u32 count = 0;
index 95548c5..ed0d368 100644 (file)
@@ -49,10 +49,7 @@ static int imu_v11_0_init_microcode(struct amdgpu_device *adev)
        amdgpu_ucode_ip_version_decode(adev, GC_HWIP, ucode_prefix, sizeof(ucode_prefix));
 
        snprintf(fw_name, sizeof(fw_name), "amdgpu/%s_imu.bin", ucode_prefix);
-       err = request_firmware(&adev->gfx.imu_fw, fw_name, adev->dev);
-       if (err)
-               goto out;
-       err = amdgpu_ucode_validate(adev->gfx.imu_fw);
+       err = amdgpu_ucode_request(adev, &adev->gfx.imu_fw, fw_name);
        if (err)
                goto out;
        imu_hdr = (const struct imu_firmware_header_v1_0 *)adev->gfx.imu_fw->data;
@@ -77,7 +74,7 @@ out:
                dev_err(adev->dev,
                        "gfx11: Failed to load firmware \"%s\"\n",
                        fw_name);
-               release_firmware(adev->gfx.imu_fw);
+               amdgpu_ucode_release(&adev->gfx.imu_fw);
        }
 
        return err;