drm/i915/bxt: add PLL10 to the PLL state dumper
authorImre Deak <imre.deak@intel.com>
Thu, 18 Jun 2015 14:25:55 +0000 (17:25 +0300)
committerDaniel Vetter <daniel.vetter@ffwll.ch>
Tue, 30 Jun 2015 10:35:31 +0000 (12:35 +0200)
Signed-off-by: Imre Deak <imre.deak@intel.com>
Reviewed-by: Sonika Jindal <sonika.jindal@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
drivers/gpu/drm/i915/intel_display.c

index 6be8768..dd430ce 100644 (file)
@@ -12014,7 +12014,7 @@ static void intel_dump_pipe_config(struct intel_crtc *crtc,
        if (IS_BROXTON(dev)) {
                DRM_DEBUG_KMS("ddi_pll_sel: %u; dpll_hw_state: ebb0: 0x%x, ebb4: 0x%x,"
                              "pll0: 0x%x, pll1: 0x%x, pll2: 0x%x, pll3: 0x%x, "
-                             "pll6: 0x%x, pll8: 0x%x, pll9: 0x%x, pcsdw12: 0x%x\n",
+                             "pll6: 0x%x, pll8: 0x%x, pll9: 0x%x, pll10: 0x%x, pcsdw12: 0x%x\n",
                              pipe_config->ddi_pll_sel,
                              pipe_config->dpll_hw_state.ebb0,
                              pipe_config->dpll_hw_state.ebb4,
@@ -12025,6 +12025,7 @@ static void intel_dump_pipe_config(struct intel_crtc *crtc,
                              pipe_config->dpll_hw_state.pll6,
                              pipe_config->dpll_hw_state.pll8,
                              pipe_config->dpll_hw_state.pll9,
+                             pipe_config->dpll_hw_state.pll10,
                              pipe_config->dpll_hw_state.pcsdw12);
        } else if (IS_SKYLAKE(dev)) {
                DRM_DEBUG_KMS("ddi_pll_sel: %u; dpll_hw_state: "