ARM: dts: imx6q-prtwd2: configure ethernet reference clock parent
authorOleksij Rempel <o.rempel@pengutronix.de>
Tue, 31 Jan 2023 08:46:34 +0000 (09:46 +0100)
committerShawn Guo <shawnguo@kernel.org>
Mon, 6 Mar 2023 02:01:46 +0000 (10:01 +0800)
On this board the PHY is the ref clock provider. So, configure ethernet
reference clock as input.

Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
arch/arm/boot/dts/imx6q-prtwd2.dts

index 349959d..54a57a4 100644 (file)
                reg = <0x80000000 0x20000000>;
        };
 
+       clk50m_phy: phy-clock {
+               compatible = "fixed-clock";
+               #clock-cells = <0>;
+               clock-frequency = <50000000>;
+               clock-output-names = "enet_ref_pad";
+       };
+
        usdhc2_wifi_pwrseq: usdhc2_wifi_pwrseq {
                compatible = "mmc-pwrseq-simple";
                pinctrl-names = "default";
        status = "okay";
 };
 
+&clks {
+       clocks = <&clk50m_phy>;
+       clock-names = "enet_ref_pad";
+       assigned-clocks = <&clks IMX6QDL_CLK_ENET_REF_SEL>;
+       assigned-clock-parents = <&clk50m_phy>;
+};
+
 &fec {
        pinctrl-names = "default";
        pinctrl-0 = <&pinctrl_enet>;
        phy-mode = "rmii";
-       clocks = <&clks IMX6QDL_CLK_ENET>,
-                <&clks IMX6QDL_CLK_ENET>;
-       clock-names = "ipg", "ahb";
        status = "okay";
 
        fixed-link {