gas/

2006-12-29  H.J. Lu  <hongjiu.lu@intel.com>

	* config/tc-i386.c (build_modrm_byte): Handle shift count
	register with 3 operands.

gas/testsuite/

2006-12-29  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/i386/intel.s: Add tests for "shrd %cl,%edx,%eax" and
	"shld %cl,%edx,%eax".
	* gas/i386/opcode.s: Likewise.

	* gas/i386/intel.d: Updated.
	* gas/i386/opcode-intel.d: Likewise.
	* gas/i386/opcode-suffix.d: Likewise.
	* gas/i386/opcode.d: Likewise.

diff --git a/gas/ChangeLog b/gas/ChangeLog
index bb811e3..a44e94d 100644 (file)
--- a/gas/ChangeLog
+++ b/gas/ChangeLog
@@ -1,3 +1,8 @@
+2006-12-29  H.J. Lu  <hongjiu.lu@intel.com>
+
+       * config/tc-i386.c (build_modrm_byte): Handle shift count
+       register with 3 operands.
+
 2006-12-28  H.J. Lu  <hongjiu.lu@intel.com>
 
        * config/tc-i386.c (process_operands): Check i.reg_operands

diff --git a/gas/config/tc-i386.c b/gas/config/tc-i386.c
index 079e9d8..daa0ddb 100644 (file)
--- a/gas/config/tc-i386.c
+++ b/gas/config/tc-i386.c
@@ -3436,10 +3436,13 @@ build_modrm_byte ()
          source = 0;
          break;
        case 3:
-         /* When there are 3 operands, one of them must be immediate,
-            which may be the first or the last operand.  */
-         assert (i.imm_operands == 1);
-         source = (i.types[0] & Imm) ? 1 : 0;
+         /* When there are 3 operands, one of them may be immediate,
+            which may be the first or the last operand.  Otherwise,
+            the first operand must be shift count register (cl). */
+         assert (i.imm_operands == 1
+                 || (i.imm_operands == 0
+                     && (i.types[0] & ShiftCount)));
+         source = (i.types[0] & (Imm | ShiftCount)) ? 1 : 0;
          break;
        case 4:
          /* When there are 4 operands, the first two must be immediate

diff --git a/gas/testsuite/ChangeLog b/gas/testsuite/ChangeLog
index 9c38008..3561fd9 100644 (file)
--- a/gas/testsuite/ChangeLog
+++ b/gas/testsuite/ChangeLog
@@ -1,3 +1,14 @@
+2006-12-29  H.J. Lu  <hongjiu.lu@intel.com>
+
+       * gas/i386/intel.s: Add tests for "shrd %cl,%edx,%eax" and
+       "shld %cl,%edx,%eax".
+       * gas/i386/opcode.s: Likewise.
+
+       * gas/i386/intel.d: Updated.
+       * gas/i386/opcode-intel.d: Likewise.
+       * gas/i386/opcode-suffix.d: Likewise.
+       * gas/i386/opcode.d: Likewise.
+
 2006-12-27  Kazu Hirata  <kazu@codesourcery.com>
 
        * gas/m68k/all.exp: Add support for fido.

diff --git a/gas/testsuite/gas/i386/intel.d b/gas/testsuite/gas/i386/intel.d
index 184cdbc..69202ce 100644 (file)
--- a/gas/testsuite/gas/i386/intel.d
+++ b/gas/testsuite/gas/i386/intel.d
@@ -628,5 +628,6 @@ Disassembly of section .text:
  a87:  b0 11 [         ]*mov    \$0x11,%al
  a89:  b3 47 [         ]*mov    \$0x47,%bl
  a8b:  b3 47 [         ]*mov    \$0x47,%bl
- a8d:  00 00 .*
+ a8d:  0f ad d0 [      ]*shrd   %cl,%edx,%eax
+ a90:  0f a5 d0 [      ]*shld   %cl,%edx,%eax
 [      ]*...

diff --git a/gas/testsuite/gas/i386/intel.s b/gas/testsuite/gas/i386/intel.s
index e0eedc9..ef65aa9 100644 (file)
--- a/gas/testsuite/gas/i386/intel.s
+++ b/gas/testsuite/gas/i386/intel.s
@@ -624,5 +624,8 @@ rot5:
        mov     %al, 0x11
        mov     %bl, ((( 0x4711  ) >> 8) & 0xff) 
        mov     %bl, 0x47
-       
+
+ shrd   eax, edx, cl
+ shld   eax, edx, cl
+
  .p2align 4,0

diff --git a/gas/testsuite/gas/i386/opcode-intel.d b/gas/testsuite/gas/i386/opcode-intel.d
index c4ea835..2a3c44b 100644 (file)
--- a/gas/testsuite/gas/i386/opcode-intel.d
+++ b/gas/testsuite/gas/i386/opcode-intel.d
@@ -606,4 +606,6 @@ Disassembly of section .text:
  *[0-9a-f]+:   0f 00 c8[       ]+str[  ]+eax
  *[0-9a-f]+:   66 0f 00 c8[    ]+str[  ]+ax
  *[0-9a-f]+:   0f 00 08[       ]+str[  ]+(WORD PTR )?\[eax\]
+ *[0-9a-f]+:   0f ad d0 [      ]*shrd[         ]+eax,edx,cl
+ *[0-9a-f]+:   0f a5 d0 [      ]*shld[         ]+eax,edx,cl
        \.\.\.

diff --git a/gas/testsuite/gas/i386/opcode-suffix.d b/gas/testsuite/gas/i386/opcode-suffix.d
index 95788b4..de9c745 100644 (file)
--- a/gas/testsuite/gas/i386/opcode-suffix.d
+++ b/gas/testsuite/gas/i386/opcode-suffix.d
@@ -583,4 +583,6 @@ Disassembly of section .text:
  *[0-9a-f]+:   0f 00 c8[       ]+strl[         ]+%eax
  *[0-9a-f]+:   66 0f 00 c8[    ]+strw[         ]+%ax
  *[0-9a-f]+:   0f 00 08[       ]+strw[         ]+\(%eax\)
+ *[0-9a-f]+:   0f ad d0 [      ]*shrdl[        ]+%cl,%edx,%eax
+ *[0-9a-f]+:   0f a5 d0 [      ]*shldl[        ]+%cl,%edx,%eax
        \.\.\.

diff --git a/gas/testsuite/gas/i386/opcode.d b/gas/testsuite/gas/i386/opcode.d
index b0eea3c..f7ae921 100644 (file)
--- a/gas/testsuite/gas/i386/opcode.d
+++ b/gas/testsuite/gas/i386/opcode.d
@@ -582,4 +582,6 @@ Disassembly of section .text:
  9e5:  0f 00 c8 [      ]*str    %eax
  9e8:  66 0f 00 c8 [   ]*str    %ax
  9ec:  0f 00 08 [      ]*str    \(%eax\)
+ 9ef:  0f ad d0 [      ]*shrd   %cl,%edx,%eax
+ 9f2:  0f a5 d0 [      ]*shld   %cl,%edx,%eax
        \.\.\.

diff --git a/gas/testsuite/gas/i386/opcode.s b/gas/testsuite/gas/i386/opcode.s
index f289042..d5641dc 100644 (file)
--- a/gas/testsuite/gas/i386/opcode.s
+++ b/gas/testsuite/gas/i386/opcode.s
@@ -578,5 +578,8 @@ foo:
  str   %ax
  str   (%eax)
 
+ shrd   %cl,%edx,%eax
+ shld   %cl,%edx,%eax
+
 # Force a good alignment.
  .p2align 4,0