ARM: at91: add RSTC (Reset Controller) dt support

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Acked-by: Rob Herring <rob.herring@calxeda.com>
Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>

diff --git a/Documentation/devicetree/bindings/arm/atmel-at91.txt b/Documentation/devicetree/bindings/arm/atmel-at91.txt
index 1aeaf6f..a64f867 100644 (file)
--- a/Documentation/devicetree/bindings/arm/atmel-at91.txt
+++ b/Documentation/devicetree/bindings/arm/atmel-at91.txt
@@ -30,3 +30,15 @@ One interrupt per TC channel in a TC block:
                reg = <0xfffdc000 0x100>;
                interrupts = <26 4 27 4 28 4>;
        };
+
+RSTC Reset Controller required properties:
+- compatible: Should be "atmel,<chip>-rstc".
+  <chip> can be "at91sam9260" or "at91sam9g45"
+- reg: Should contain registers location and length
+
+Example:
+
+       rstc@fffffd00 {
+               compatible = "atmel,at91sam9260-rstc";
+               reg = <0xfffffd00 0x10>;
+       };

diff --git a/arch/arm/boot/dts/at91sam9g20.dtsi b/arch/arm/boot/dts/at91sam9g20.dtsi
index dd5d114..bcad6e7 100644 (file)
--- a/arch/arm/boot/dts/at91sam9g20.dtsi
+++ b/arch/arm/boot/dts/at91sam9g20.dtsi
@@ -64,6 +64,11 @@
                                reg = <0xfffffc00 0x100>;
                        };
 
+                       rstc@fffffd00 {
+                               compatible = "atmel,at91sam9260-rstc";
+                               reg = <0xfffffd00 0x10>;
+                       };
+
                        pit: timer@fffffd30 {
                                compatible = "atmel,at91sam9260-pit";
                                reg = <0xfffffd30 0xf>;

diff --git a/arch/arm/boot/dts/at91sam9g45.dtsi b/arch/arm/boot/dts/at91sam9g45.dtsi
index 621a329..faccd4f 100644 (file)
--- a/arch/arm/boot/dts/at91sam9g45.dtsi
+++ b/arch/arm/boot/dts/at91sam9g45.dtsi
@@ -65,6 +65,11 @@
                                reg = <0xfffffc00 0x100>;
                        };
 
+                       rstc@fffffd00 {
+                               compatible = "atmel,at91sam9g45-rstc";
+                               reg = <0xfffffd00 0x10>;
+                       };
+
                        pit: timer@fffffd30 {
                                compatible = "atmel,at91sam9260-pit";
                                reg = <0xfffffd30 0xf>;

diff --git a/arch/arm/boot/dts/at91sam9x5.dtsi b/arch/arm/boot/dts/at91sam9x5.dtsi
index 3855843..d9a93fd 100644 (file)
--- a/arch/arm/boot/dts/at91sam9x5.dtsi
+++ b/arch/arm/boot/dts/at91sam9x5.dtsi
@@ -63,6 +63,11 @@
                                reg = <0xfffffc00 0x100>;
                        };
 
+                       rstc@fffffe00 {
+                               compatible = "atmel,at91sam9g45-rstc";
+                               reg = <0xfffffe00 0x10>;
+                       };
+
                        pit: timer@fffffe30 {
                                compatible = "atmel,at91sam9260-pit";
                                reg = <0xfffffe30 0xf>;

diff --git a/arch/arm/mach-at91/at91sam9x5.c b/arch/arm/mach-at91/at91sam9x5.c
index 7bec5a4..c121fe5 100644 (file)
--- a/arch/arm/mach-at91/at91sam9x5.c
+++ b/arch/arm/mach-at91/at91sam9x5.c
@@ -306,7 +306,6 @@ static void __init at91sam9x5_ioremap_registers(void)
 
 void __init at91sam9x5_initialize(void)
 {
-       arm_pm_restart = at91sam9g45_restart;
        at91_extern_irq = (1 << AT91SAM9X5_ID_IRQ0);
 
        /* Register GPIO subsystem (using DT) */

diff --git a/arch/arm/mach-at91/setup.c b/arch/arm/mach-at91/setup.c
index d7abc25..3e48b59 100644 (file)
--- a/arch/arm/mach-at91/setup.c
+++ b/arch/arm/mach-at91/setup.c
@@ -287,8 +287,38 @@ void __init at91_ioremap_matrix(u32 base_addr)
 }
 
 #if defined(CONFIG_OF)
+static struct of_device_id rstc_ids[] = {
+       { .compatible = "atmel,at91sam9260-rstc", .data = at91sam9_alt_restart },
+       { .compatible = "atmel,at91sam9g45-rstc", .data = at91sam9g45_restart },
+       { /*sentinel*/ }
+};
+
+static void at91_dt_rstc(void)
+{
+       struct device_node *np;
+       const struct of_device_id *of_id;
+
+       np = of_find_matching_node(NULL, rstc_ids);
+       if (!np)
+               panic("unable to find compatible rstc node in dtb\n");
+
+       at91_rstc_base = of_iomap(np, 0);
+       if (!at91_rstc_base)
+               panic("unable to map rstc cpu registers\n");
+
+       of_id = of_match_node(rstc_ids, np);
+       if (!of_id)
+               panic("AT91: rtsc no restart function availlable\n");
+
+       arm_pm_restart = of_id->data;
+
+       of_node_put(np);
+}
+
 void __init at91_dt_initialize(void)
 {
+       at91_dt_rstc();
+
        /* temporary until have the ramc binding*/
        at91_boot_soc.ioremap_registers();