arm64, topology: Define JUNO energy and provide it to the scheduler

This patch is only here to be able to test provisioning of energy related
data from an arch topology shim layer to the scheduler. Since there is no
code today which deals with extracting energy related data from the dtb or
acpi, and process it in the topology shim layer, the content of the
sched_group_energy structures as well as the idle_state and capacity_state
arrays are hard-coded here.

This patch defines the sched_group_energy structure as well as the
idle_state and capacity_state array for the cluster (relates to sched
groups (sgs) in DIE sched domain level) and for the core (relates to sgs
in MC sd level) for a Cortex A53 as well as for a Cortex A57.
It further provides related implementations of the sched_domain_energy_f
functions (cpu_cluster_energy() and cpu_core_energy()).

To be able to propagate this information from the topology shim layer to
the scheduler, the elements of the arm_topology[] table have been
provisioned with the appropriate sched_domain_energy_f functions.

Signed-off-by: Juri Lelli <juri.lelli@arm.com>
Signed-off-by: Lukasz Luba <l.luba@partner.samsung.com>

diff --git a/arch/arm64/kernel/topology.c b/arch/arm64/kernel/topology.c
index de70e2194d8d9efa749ad8c88a93a70712650129..d72c5d23b6bc3e69b8b92d96393ea9494112407d 100644 (file)
--- a/arch/arm64/kernel/topology.c
+++ b/arch/arm64/kernel/topology.c
@@ -214,6 +214,120 @@ out:
 struct cpu_topology cpu_topology[NR_CPUS];
 EXPORT_SYMBOL_GPL(cpu_topology);
 
+/*
+ * ARM JUNO specific energy cost model data. There are no unit requirements for
+ * the data. Data can be normalized to any reference point, but the
+ * normalization must be consistent. That is, one bogo-joule/watt must be the
+ * same quantity for all data, but we don't care what it is.
+ */
+
+static struct idle_state idle_states_cluster_a53[] = {
+       { .power = 56 }, /* arch_cpu_idle() (active idle) = WFI */
+       { .power = 56 }, /* WFI */
+       { .power = 56 }, /* cpu-sleep-0 */
+       { .power = 17 }, /* cluster-sleep-0 */
+};
+
+static struct idle_state idle_states_cluster_a57[] = {
+       { .power = 65 }, /* arch_cpu_idle() (active idle) = WFI */
+       { .power = 65 }, /* WFI */
+       { .power = 65 }, /* cpu-sleep-0 */
+       { .power = 24 }, /* cluster-sleep-0 */
+};
+
+static struct capacity_state cap_states_cluster_a53[] = {
+        /* Power per cluster */
+       { .cap =  235, .power = 26, }, /*  450 MHz */
+       { .cap =  303, .power = 30, }, /*  575 MHz */
+       { .cap =  368, .power = 39, }, /*  700 MHz */
+       { .cap =  406, .power = 47, }, /*  775 MHz */
+       { .cap =  447, .power = 57, }, /*  850 Mhz */
+};
+
+static struct capacity_state cap_states_cluster_a57[] = {
+        /* Power per cluster */
+       { .cap =  417, .power = 24, }, /*  450 MHz */
+       { .cap =  579, .power = 32, }, /*  625 MHz */
+       { .cap =  744, .power = 43, }, /*  800 MHz */
+       { .cap =  883, .power = 49, }, /*  950 MHz */
+       { .cap = 1024, .power = 64, }, /* 1100 MHz */
+};
+
+static struct sched_group_energy energy_cluster_a53 = {
+       .nr_idle_states = ARRAY_SIZE(idle_states_cluster_a53),
+       .idle_states    = idle_states_cluster_a53,
+       .nr_cap_states  = ARRAY_SIZE(cap_states_cluster_a53),
+       .cap_states     = cap_states_cluster_a53,
+};
+
+static struct sched_group_energy energy_cluster_a57 = {
+       .nr_idle_states = ARRAY_SIZE(idle_states_cluster_a57),
+       .idle_states    = idle_states_cluster_a57,
+       .nr_cap_states  = ARRAY_SIZE(cap_states_cluster_a57),
+       .cap_states     = cap_states_cluster_a57,
+};
+
+static struct idle_state idle_states_core_a53[] = {
+       { .power = 6 }, /* arch_cpu_idle() (active idle) = WFI */
+       { .power = 6 }, /* WFI */
+       { .power = 0 }, /* cpu-sleep-0 */
+       { .power = 0 }, /* cluster-sleep-0 */
+};
+
+static struct idle_state idle_states_core_a57[] = {
+       { .power = 15 }, /* arch_cpu_idle() (active idle) = WFI */
+       { .power = 15 }, /* WFI */
+       { .power = 0  }, /* cpu-sleep-0 */
+       { .power = 0  }, /* cluster-sleep-0 */
+};
+
+static struct capacity_state cap_states_core_a53[] = {
+        /* Power per cpu */
+       { .cap =  235, .power =  33, }, /*  450 MHz */
+       { .cap =  302, .power =  46, }, /*  575 MHz */
+       { .cap =  368, .power =  61, }, /*  700 MHz */
+       { .cap =  406, .power =  76, }, /*  775 MHz */
+       { .cap =  447, .power =  93, }, /*  850 Mhz */
+};
+
+static struct capacity_state cap_states_core_a57[] = {
+        /* Power per cpu */
+       { .cap =  417, .power = 168, }, /*  450 MHz */
+       { .cap =  579, .power = 251, }, /*  625 MHz */
+       { .cap =  744, .power = 359, }, /*  800 MHz */
+       { .cap =  883, .power = 479, }, /*  950 MHz */
+       { .cap = 1024, .power = 616, }, /* 1100 MHz */
+};
+
+static struct sched_group_energy energy_core_a53 = {
+       .nr_idle_states = ARRAY_SIZE(idle_states_core_a53),
+       .idle_states    = idle_states_core_a53,
+       .nr_cap_states  = ARRAY_SIZE(cap_states_core_a53),
+       .cap_states     = cap_states_core_a53,
+};
+
+static struct sched_group_energy energy_core_a57 = {
+         .nr_idle_states = ARRAY_SIZE(idle_states_core_a57),
+         .idle_states    = idle_states_core_a57,
+         .nr_cap_states  = ARRAY_SIZE(cap_states_core_a57),
+         .cap_states     = cap_states_core_a57,
+};
+
+/* sd energy functions */
+static inline
+const struct sched_group_energy * const cpu_cluster_energy(int cpu)
+{
+       return cpu_topology[cpu].cluster_id ? &energy_cluster_a53 :
+                       &energy_cluster_a57;
+}
+
+static inline
+const struct sched_group_energy * const cpu_core_energy(int cpu)
+{
+       return cpu_topology[cpu].cluster_id ? &energy_core_a53 :
+                       &energy_core_a57;
+}
+
 const struct cpumask *cpu_coregroup_mask(int cpu)
 {
        return &cpu_topology[cpu].core_sibling;
@@ -302,17 +416,6 @@ static int cpu_flags(void)
        return topology_cpu_flags();
 }
 
-static struct sched_domain_topology_level arm64_topology[] = {
-#ifdef CONFIG_SCHED_SMT
-       { cpu_smt_mask, smt_flags, SD_INIT_NAME(SMT) },
-#endif
-#ifdef CONFIG_SCHED_MC
-       { cpu_coregroup_mask, core_flags, SD_INIT_NAME(MC) },
-#endif
-       { cpu_cpu_mask, cpu_flags, SD_INIT_NAME(DIE) },
-       { NULL, }
-};
-
 static void __init reset_cpu_topology(void)
 {
        unsigned int cpu;
@@ -331,6 +434,17 @@ static void __init reset_cpu_topology(void)
        }
 }
 
+static struct sched_domain_topology_level arm64_topology[] = {
+#ifdef CONFIG_SCHED_SMT
+       { cpu_smt_mask, smt_flags, SD_INIT_NAME(SMT) },
+#endif
+#ifdef CONFIG_SCHED_MC
+       { cpu_coregroup_mask, core_flags, cpu_core_energy, SD_INIT_NAME(MC) },
+#endif
+       { cpu_cpu_mask, cpu_flags, cpu_cluster_energy, SD_INIT_NAME(DIE) },
+       { NULL, }
+};
+
 void __init init_cpu_topology(void)
 {
        reset_cpu_topology();