arm64: dts: ls1028a: Add FlexSPI support
authorAshish Kumar <Ashish.Kumar@nxp.com>
Wed, 4 Dec 2019 10:58:14 +0000 (16:28 +0530)
committerShawn Guo <shawnguo@kernel.org>
Wed, 11 Dec 2019 03:13:21 +0000 (11:13 +0800)
Add fspi node property for LS1028A SoC for FlexSPI driver.
Property added for FlexSPI controller and for the connected
slave device for the LS1028ARDB and LS1028AQDS target.
RDB and QDS are having one SPI-NOR flash device, mt35xu02g
connected at CS0.
This flash device "mt35xu02g" is tested for octal read

Signed-off-by: Xiaowei Bao <xiaowei.bao@nxp.com>
Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
arch/arm64/boot/dts/freescale/fsl-ls1028a-qds.dts
arch/arm64/boot/dts/freescale/fsl-ls1028a-rdb.dts
arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi

index 5b9d4b3..ca409d9 100644 (file)
        status = "okay";
 };
 
+&fspi {
+       status = "okay";
+
+       mt35xu02g0: flash@0 {
+               compatible = "jedec,spi-nor";
+               #address-cells = <1>;
+               #size-cells = <1>;
+               spi-max-frequency = <50000000>;
+               /* The following setting enables 1-1-8 (CMD-ADDR-DATA) mode */
+               spi-rx-bus-width = <8>; /* 8 SPI Rx lines */
+               spi-tx-bus-width = <1>; /* 1 SPI Tx line */
+               reg = <0>;
+       };
+};
+
 &i2c0 {
        status = "okay";
 
index 9720a19..af25c09 100644 (file)
        status = "okay";
 };
 
+&fspi {
+       status = "okay";
+
+       mt35xu02g0: flash@0 {
+               compatible = "jedec,spi-nor";
+               #address-cells = <1>;
+               #size-cells = <1>;
+               spi-max-frequency = <50000000>;
+               /* The following setting enables 1-1-8 (CMD-ADDR-DATA) mode */
+               spi-rx-bus-width = <8>; /* 8 SPI Rx lines */
+               spi-tx-bus-width = <1>; /* 1 SPI Tx line */
+               reg = <0>;
+       };
+};
+
 &i2c0 {
        status = "okay";
 
index 8e8a77e..f7b79fc 100644 (file)
                        status = "disabled";
                };
 
+               fspi: spi@20c0000 {
+                       compatible = "nxp,lx2160a-fspi";
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       reg = <0x0 0x20c0000 0x0 0x10000>,
+                             <0x0 0x20000000 0x0 0x10000000>;
+                       reg-names = "fspi_base", "fspi_mmap";
+                       interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&clockgen 4 3>, <&clockgen 4 3>;
+                       clock-names = "fspi_en", "fspi";
+                       status = "disabled";
+               };
+
                esdhc: mmc@2140000 {
                        compatible = "fsl,ls1028a-esdhc", "fsl,esdhc";
                        reg = <0x0 0x2140000 0x0 0x10000>;