compiler: Turn off all the compiler spew by default

diff --git a/icd/intel/cmd_pipeline.c b/icd/intel/cmd_pipeline.c
index 676c491..e476aaa 100644 (file)
--- a/icd/intel/cmd_pipeline.c
+++ b/icd/intel/cmd_pipeline.c
@@ -457,7 +457,6 @@ static void gen7_fill_3DSTATE_SBE_body(const struct intel_cmd *cmd,
     assert(vs->out_count >= 2);
     attr_skip = 2;
     attr_count = vs->out_count - attr_skip;
-    printf("%d %d\n", fs->in_count, attr_count);
     assert(fs->in_count == attr_count);
     assert(fs->in_count <= 32);
 

diff --git a/icd/intel/compiler/pipeline/intel_debug.c b/icd/intel/compiler/pipeline/intel_debug.c
index 738fc90..1763096 100644 (file)
--- a/icd/intel/compiler/pipeline/intel_debug.c
+++ b/icd/intel/compiler/pipeline/intel_debug.c
@@ -33,7 +33,8 @@
 #include "intel_debug.h"
 //#include "utils.h"  // LunarG :
 
-uint64_t INTEL_DEBUG = DEBUG_WM | DEBUG_NO16 | DEBUG_VS;
+//uint64_t INTEL_DEBUG = DEBUG_WM | DEBUG_NO16 | DEBUG_VS;
+uint64_t INTEL_DEBUG = 0;
 
 //static const struct dri_debug_control debug_control[] = {
 //   { "tex",   DEBUG_TEXTURE},

diff --git a/icd/intel/compiler/pipeline/pipeline_compiler_interface.cpp b/icd/intel/compiler/pipeline/pipeline_compiler_interface.cpp
index fe31c10..a51cc93 100644 (file)
--- a/icd/intel/compiler/pipeline/pipeline_compiler_interface.cpp
+++ b/icd/intel/compiler/pipeline/pipeline_compiler_interface.cpp
@@ -301,8 +301,6 @@ XGL_RESULT intel_pipeline_shader_compile(struct intel_pipeline_shader *pipe_shad
 
             struct brw_vs_prog_data *data = get_vs_prog_data(brw->shader_prog);
 
-            vs_data_dump(stdout, data);
-
             if (data->uses_vertexid)
                 pipe_shader->uses |= INTEL_SHADER_USE_VID;
 
@@ -312,12 +310,17 @@ XGL_RESULT intel_pipeline_shader_compile(struct intel_pipeline_shader *pipe_shad
             pipe_shader->out_count = data->base.vue_map.num_slots;// = 2;
             pipe_shader->urb_grf_start = data->base.dispatch_grf_start_reg;// = 1;
             pipe_shader->surface_count = data->base.base.binding_table.size_bytes / 4;
-            printf("out_count: %d\n", pipe_shader->out_count);
 
-            fprintf(stdout,"\nISA generated by compiler:\n");
-            fprintf(stdout,"ISA size: %i\n", pipe_shader->codeSize);
-            hexdump(stdout, pipe_shader->pCode, pipe_shader->codeSize);
-            fflush(stdout);
+            if (unlikely(INTEL_DEBUG & DEBUG_VS)) {
+                printf("out_count: %d\n", pipe_shader->out_count);
+
+                vs_data_dump(stdout, data);
+
+                fprintf(stdout,"\nISA generated by compiler:\n");
+                fprintf(stdout,"ISA size: %i\n", pipe_shader->codeSize);
+                hexdump(stdout, pipe_shader->pCode, pipe_shader->codeSize);
+                fflush(stdout);
+            }
         }
             break;
 
@@ -342,13 +345,9 @@ XGL_RESULT intel_pipeline_shader_compile(struct intel_pipeline_shader *pipe_shad
 
             struct brw_wm_prog_data *data = get_wm_prog_data(brw->shader_prog);
 
-            // print out the supporting structures generated by the BE compile:
-            fs_data_dump(stdout, data);
-
             pipe_shader->surface_count = data->base.binding_table.size_bytes / 4;
             pipe_shader->urb_grf_start = data->first_curbe_grf;
             pipe_shader->in_count      = data->num_varying_inputs;
-            printf("in_count: %d\n", pipe_shader->in_count);
 
             // Ensure this is 1:1, or create a converter
             pipe_shader->barycentric_interps = data->barycentric_interp_modes;
@@ -360,11 +359,17 @@ XGL_RESULT intel_pipeline_shader_compile(struct intel_pipeline_shader *pipe_shad
             pipe_shader->out_count = 1;
             pipe_shader->uses; // ??
 
+            if (unlikely(INTEL_DEBUG & DEBUG_WM)) {
+                // print out the supporting structures generated by the BE compile:
+                fs_data_dump(stdout, data);
+
+                printf("in_count: %d\n", pipe_shader->in_count);
 
-            fprintf(stdout,"\nISA generated by compiler:\n");
-            fprintf(stdout,"ISA size: %i\n", pipe_shader->codeSize);
-            hexdump(stdout, pipe_shader->pCode, pipe_shader->codeSize);
-            fflush(stdout);
+                fprintf(stdout,"\nISA generated by compiler:\n");
+                fprintf(stdout,"ISA size: %i\n", pipe_shader->codeSize);
+                hexdump(stdout, pipe_shader->pCode, pipe_shader->codeSize);
+                fflush(stdout);
+            }
         }
             break;
 

diff --git a/icd/intel/compiler/shader/compiler_interface.cpp b/icd/intel/compiler/shader/compiler_interface.cpp
index 951733e..257a1e2 100644 (file)
--- a/icd/intel/compiler/shader/compiler_interface.cpp
+++ b/icd/intel/compiler/shader/compiler_interface.cpp
@@ -329,7 +329,7 @@ struct intel_ir *shader_create_ir(const struct intel_gpu *gpu,
     shader_program->Type = shader->Stage;
 
     bool dump_ast = false;
-    bool dump_hir = true;
+    bool dump_hir = false;
     bool do_link  = true;
 
     _mesa_glsl_compile_shader(ctx, shader, dump_ast, dump_hir);