GRH32Reg,
GR64Reg,
GR128Reg,
- ADDR32Reg,
- ADDR64Reg,
FP32Reg,
FP64Reg,
FP128Reg,
// Base + Disp + Index, where Base and Index are LLVM registers or 0.
// MemKind says what type of memory this is and RegKind says what type
- // the base register has (ADDR32Reg or ADDR64Reg). Length is the operand
+ // the base register has (GR32Reg or GR64Reg). Length is the operand
// length for D(L,B)-style operands, otherwise it is null.
struct MemOp {
unsigned Base : 12;
bool isGRX32() const { return false; }
bool isGR64() const { return isReg(GR64Reg); }
bool isGR128() const { return isReg(GR128Reg); }
- bool isADDR32() const { return isReg(ADDR32Reg); }
- bool isADDR64() const { return isReg(ADDR64Reg); }
+ bool isADDR32() const { return isReg(GR32Reg); }
+ bool isADDR64() const { return isReg(GR64Reg); }
bool isADDR128() const { return false; }
bool isFP32() const { return isReg(FP32Reg); }
bool isFP64() const { return isReg(FP64Reg); }
bool isAR32() const { return isReg(AR32Reg); }
bool isCR64() const { return isReg(CR64Reg); }
bool isAnyReg() const { return (isReg() || isImm(0, 15)); }
- bool isBDAddr32Disp12() const { return isMemDisp12(BDMem, ADDR32Reg); }
- bool isBDAddr32Disp20() const { return isMemDisp20(BDMem, ADDR32Reg); }
- bool isBDAddr64Disp12() const { return isMemDisp12(BDMem, ADDR64Reg); }
- bool isBDAddr64Disp20() const { return isMemDisp20(BDMem, ADDR64Reg); }
- bool isBDXAddr64Disp12() const { return isMemDisp12(BDXMem, ADDR64Reg); }
- bool isBDXAddr64Disp20() const { return isMemDisp20(BDXMem, ADDR64Reg); }
- bool isBDLAddr64Disp12Len4() const { return isMemDisp12Len4(ADDR64Reg); }
- bool isBDLAddr64Disp12Len8() const { return isMemDisp12Len8(ADDR64Reg); }
- bool isBDRAddr64Disp12() const { return isMemDisp12(BDRMem, ADDR64Reg); }
- bool isBDVAddr64Disp12() const { return isMemDisp12(BDVMem, ADDR64Reg); }
+ bool isBDAddr32Disp12() const { return isMemDisp12(BDMem, GR32Reg); }
+ bool isBDAddr32Disp20() const { return isMemDisp20(BDMem, GR32Reg); }
+ bool isBDAddr64Disp12() const { return isMemDisp12(BDMem, GR64Reg); }
+ bool isBDAddr64Disp20() const { return isMemDisp20(BDMem, GR64Reg); }
+ bool isBDXAddr64Disp12() const { return isMemDisp12(BDXMem, GR64Reg); }
+ bool isBDXAddr64Disp20() const { return isMemDisp20(BDXMem, GR64Reg); }
+ bool isBDLAddr64Disp12Len4() const { return isMemDisp12Len4(GR64Reg); }
+ bool isBDLAddr64Disp12Len8() const { return isMemDisp12Len8(GR64Reg); }
+ bool isBDRAddr64Disp12() const { return isMemDisp12(BDRMem, GR64Reg); }
+ bool isBDVAddr64Disp12() const { return isMemDisp12(BDVMem, GR64Reg); }
bool isU1Imm() const { return isImm(0, 1); }
bool isU2Imm() const { return isImm(0, 3); }
bool isU3Imm() const { return isImm(0, 7); }
bool parseRegister(Register &Reg, bool RestoreOnFailure = false);
- bool parseRegister(Register &Reg, RegisterGroup Group, const unsigned *Regs,
- bool IsAddress = false);
+ bool parseRegister(Register &Reg, RegisterGroup Group, const unsigned *Regs);
OperandMatchResultTy parseRegister(OperandVector &Operands,
RegisterGroup Group, const unsigned *Regs,
return parseRegister(Operands, RegGR, SystemZMC::GR128Regs, GR128Reg);
}
OperandMatchResultTy parseADDR32(OperandVector &Operands) {
- return parseRegister(Operands, RegGR, SystemZMC::GR32Regs, ADDR32Reg);
+ // For the AsmParser, we will accept %r0 for ADDR32 as well.
+ return parseRegister(Operands, RegGR, SystemZMC::GR32Regs, GR32Reg);
}
OperandMatchResultTy parseADDR64(OperandVector &Operands) {
- return parseRegister(Operands, RegGR, SystemZMC::GR64Regs, ADDR64Reg);
+ // For the AsmParser, we will accept %r0 for ADDR64 as well.
+ return parseRegister(Operands, RegGR, SystemZMC::GR64Regs, GR64Reg);
}
OperandMatchResultTy parseADDR128(OperandVector &Operands) {
llvm_unreachable("Shouldn't be used as an operand");
return parseAnyRegister(Operands);
}
OperandMatchResultTy parseBDAddr32(OperandVector &Operands) {
- return parseAddress(Operands, BDMem, SystemZMC::GR32Regs, ADDR32Reg);
+ return parseAddress(Operands, BDMem, SystemZMC::GR32Regs, GR32Reg);
}
OperandMatchResultTy parseBDAddr64(OperandVector &Operands) {
- return parseAddress(Operands, BDMem, SystemZMC::GR64Regs, ADDR64Reg);
+ return parseAddress(Operands, BDMem, SystemZMC::GR64Regs, GR64Reg);
}
OperandMatchResultTy parseBDXAddr64(OperandVector &Operands) {
- return parseAddress(Operands, BDXMem, SystemZMC::GR64Regs, ADDR64Reg);
+ return parseAddress(Operands, BDXMem, SystemZMC::GR64Regs, GR64Reg);
}
OperandMatchResultTy parseBDLAddr64(OperandVector &Operands) {
- return parseAddress(Operands, BDLMem, SystemZMC::GR64Regs, ADDR64Reg);
+ return parseAddress(Operands, BDLMem, SystemZMC::GR64Regs, GR64Reg);
}
OperandMatchResultTy parseBDRAddr64(OperandVector &Operands) {
- return parseAddress(Operands, BDRMem, SystemZMC::GR64Regs, ADDR64Reg);
+ return parseAddress(Operands, BDRMem, SystemZMC::GR64Regs, GR64Reg);
}
OperandMatchResultTy parseBDVAddr64(OperandVector &Operands) {
- return parseAddress(Operands, BDVMem, SystemZMC::GR64Regs, ADDR64Reg);
+ return parseAddress(Operands, BDVMem, SystemZMC::GR64Regs, GR64Reg);
}
OperandMatchResultTy parsePCRel12(OperandVector &Operands) {
return parsePCRel(Operands, -(1LL << 12), (1LL << 12) - 1, false);
// Parse a register of group Group. If Regs is nonnull, use it to map
// the raw register number to LLVM numbering, with zero entries
-// indicating an invalid register. IsAddress says whether the
-// register appears in an address context. Allow FP Group if expecting
+// indicating an invalid register. Allow FP Group if expecting
// RegV Group, since the f-prefix yields the FP group even while used
// with vector instructions.
bool SystemZAsmParser::parseRegister(Register &Reg, RegisterGroup Group,
- const unsigned *Regs, bool IsAddress) {
+ const unsigned *Regs) {
if (parseRegister(Reg))
return true;
if (Reg.Group != Group && !(Reg.Group == RegFP && Group == RegV))
return Error(Reg.StartLoc, "invalid operand for instruction");
if (Regs && Regs[Reg.Num] == 0)
return Error(Reg.StartLoc, "invalid register pair");
- if (Reg.Num == 0 && IsAddress)
- return Error(Reg.StartLoc, "%r0 used in an address");
if (Regs)
Reg.Num = Regs[Reg.Num];
return false;
return MatchOperand_NoMatch;
Register Reg;
- bool IsAddress = (Kind == ADDR32Reg || Kind == ADDR64Reg);
- if (parseRegister(Reg, Group, Regs, IsAddress))
+ if (parseRegister(Reg, Group, Regs))
return MatchOperand_ParseFail;
Operands.push_back(SystemZOperand::createReg(Kind, Reg.Num,
} else if (Reg.Group != RegGR) {
Error(Reg.StartLoc, "invalid address register");
return true;
- } else if (Reg.Num == 0) {
- Error(Reg.StartLoc, "%r0 used in an address");
- return true;
}
return false;
}
#CHECK: cdpt %f0, -1(1,%r1), 0
#CHECK: error: invalid operand
#CHECK: cdpt %f0, 4096(1,%r1), 0
-#CHECK: error: %r0 used in an address
-#CHECK: cdpt %f0, 0(1,%r0), 0
#CHECK: error: invalid use of indexed addressing
#CHECK: cdpt %f0, 0(%r1,%r2), 0
#CHECK: error: unknown token in expression
cdpt %f0, 0(257,%r1), 0
cdpt %f0, -1(1,%r1), 0
cdpt %f0, 4096(1,%r1), 0
- cdpt %f0, 0(1,%r0), 0
cdpt %f0, 0(%r1,%r2), 0
cdpt %f0, 0(-), 0
#CHECK: cpdt %f0, -1(1,%r1), 0
#CHECK: error: invalid operand
#CHECK: cpdt %f0, 4096(1,%r1), 0
-#CHECK: error: %r0 used in an address
-#CHECK: cpdt %f0, 0(1,%r0), 0
#CHECK: error: invalid use of indexed addressing
#CHECK: cpdt %f0, 0(%r1,%r2), 0
#CHECK: error: unknown token in expression
cpdt %f0, 0(257,%r1), 0
cpdt %f0, -1(1,%r1), 0
cpdt %f0, 4096(1,%r1), 0
- cpdt %f0, 0(1,%r0), 0
cpdt %f0, 0(%r1,%r2), 0
cpdt %f0, 0(-), 0
#CHECK: cpxt %f0, -1(1,%r1), 0
#CHECK: error: invalid operand
#CHECK: cpxt %f0, 4096(1,%r1), 0
-#CHECK: error: %r0 used in an address
-#CHECK: cpxt %f0, 0(1,%r0), 0
#CHECK: error: invalid use of indexed addressing
#CHECK: cpxt %f0, 0(%r1,%r2), 0
#CHECK: error: unknown token in expression
cpxt %f0, 0(257,%r1), 0
cpxt %f0, -1(1,%r1), 0
cpxt %f0, 4096(1,%r1), 0
- cpxt %f0, 0(1,%r0), 0
cpxt %f0, 0(%r1,%r2), 0
cpxt %f0, 0(-), 0
cpxt %f15, 0(1), 0
#CHECK: cxpt %f0, -1(1,%r1), 0
#CHECK: error: invalid operand
#CHECK: cxpt %f0, 4096(1,%r1), 0
-#CHECK: error: %r0 used in an address
-#CHECK: cxpt %f0, 0(1,%r0), 0
#CHECK: error: invalid use of indexed addressing
#CHECK: cxpt %f0, 0(%r1,%r2), 0
#CHECK: error: unknown token in expression
cxpt %f0, 0(257,%r1), 0
cxpt %f0, -1(1,%r1), 0
cxpt %f0, 4096(1,%r1), 0
- cxpt %f0, 0(1,%r0), 0
cxpt %f0, 0(%r1,%r2), 0
cxpt %f0, 0(-), 0
cxpt %f15, 0(1), 0
#CHECK: vlgv %r0, %v0, -1, 0
#CHECK: error: invalid operand
#CHECK: vlgv %r0, %v0, 4096, 0
-#CHECK: error: %r0 used in an address
-#CHECK: vlgv %r0, %v0, 0(%r0), 0
vlgv %r0, %v0, 0, -1
vlgv %r0, %v0, 0, 16
vlgv %r0, %v0, -1, 0
vlgv %r0, %v0, 4096, 0
- vlgv %r0, %v0, 0(%r0), 0
#CHECK: error: invalid operand
#CHECK: vlgvb %r0, %v0, -1
#CHECK: error: invalid operand
#CHECK: vlgvb %r0, %v0, 4096
-#CHECK: error: %r0 used in an address
-#CHECK: vlgvb %r0, %v0, 0(%r0)
vlgvb %r0, %v0, -1
vlgvb %r0, %v0, 4096
- vlgvb %r0, %v0, 0(%r0)
#CHECK: error: invalid operand
#CHECK: vlgvf %r0, %v0, -1
#CHECK: error: invalid operand
#CHECK: vlgvf %r0, %v0, 4096
-#CHECK: error: %r0 used in an address
-#CHECK: vlgvf %r0, %v0, 0(%r0)
vlgvf %r0, %v0, -1
vlgvf %r0, %v0, 4096
- vlgvf %r0, %v0, 0(%r0)
#CHECK: error: invalid operand
#CHECK: vlgvg %r0, %v0, -1
#CHECK: error: invalid operand
#CHECK: vlgvg %r0, %v0, 4096
-#CHECK: error: %r0 used in an address
-#CHECK: vlgvg %r0, %v0, 0(%r0)
vlgvg %r0, %v0, -1
vlgvg %r0, %v0, 4096
- vlgvg %r0, %v0, 0(%r0)
#CHECK: error: invalid operand
#CHECK: vlgvh %r0, %v0, -1
#CHECK: error: invalid operand
#CHECK: vlgvh %r0, %v0, 4096
-#CHECK: error: %r0 used in an address
-#CHECK: vlgvh %r0, %v0, 0(%r0)
vlgvh %r0, %v0, -1
vlgvh %r0, %v0, 4096
- vlgvh %r0, %v0, 0(%r0)
#CHECK: error: instruction requires: vector-packed-decimal
#CHECK: vlip %v0, 0, 0
#CHECK: vll %v0, %r0, -1
#CHECK: error: invalid operand
#CHECK: vll %v0, %r0, 4096
-#CHECK: error: %r0 used in an address
-#CHECK: vll %v0, %r0, 0(%r0)
vll %v0, %r0, -1
vll %v0, %r0, 4096
- vll %v0, %r0, 0(%r0)
#CHECK: error: invalid operand
#CHECK: vllez %v0, 0, -1
#CHECK: vlvg %v0, %r0, -1, 0
#CHECK: error: invalid operand
#CHECK: vlvg %v0, %r0, 4096, 0
-#CHECK: error: %r0 used in an address
-#CHECK: vlvg %v0, %r0, 0(%r0), 0
vlvg %v0, %r0, 0, -1
vlvg %v0, %r0, 0, 16
vlvg %v0, %r0, -1, 0
vlvg %v0, %r0, 4096, 0
- vlvg %v0, %r0, 0(%r0), 0
#CHECK: error: invalid operand
#CHECK: vlvgb %v0, %r0, -1
#CHECK: error: invalid operand
#CHECK: vlvgb %v0, %r0, 4096
-#CHECK: error: %r0 used in an address
-#CHECK: vlvgb %v0, %r0, 0(%r0)
vlvgb %v0, %r0, -1
vlvgb %v0, %r0, 4096
- vlvgb %v0, %r0, 0(%r0)
#CHECK: error: invalid operand
#CHECK: vlvgf %v0, %r0, -1
#CHECK: error: invalid operand
#CHECK: vlvgf %v0, %r0, 4096
-#CHECK: error: %r0 used in an address
-#CHECK: vlvgf %v0, %r0, 0(%r0)
vlvgf %v0, %r0, -1
vlvgf %v0, %r0, 4096
- vlvgf %v0, %r0, 0(%r0)
#CHECK: error: invalid operand
#CHECK: vlvgg %v0, %r0, -1
#CHECK: error: invalid operand
#CHECK: vlvgg %v0, %r0, 4096
-#CHECK: error: %r0 used in an address
-#CHECK: vlvgg %v0, %r0, 0(%r0)
vlvgg %v0, %r0, -1
vlvgg %v0, %r0, 4096
- vlvgg %v0, %r0, 0(%r0)
#CHECK: error: invalid operand
#CHECK: vlvgh %v0, %r0, -1
#CHECK: error: invalid operand
#CHECK: vlvgh %v0, %r0, 4096
-#CHECK: error: %r0 used in an address
-#CHECK: vlvgh %v0, %r0, 0(%r0)
vlvgh %v0, %r0, -1
vlvgh %v0, %r0, 4096
- vlvgh %v0, %r0, 0(%r0)
#CHECK: error: instruction requires: vector-packed-decimal
#CHECK: vmp %v0, %v0, %v0, 0, 0
#CHECK: vstl %v0, %r0, -1
#CHECK: error: invalid operand
#CHECK: vstl %v0, %r0, 4096
-#CHECK: error: %r0 used in an address
-#CHECK: vstl %v0, %r0, 0(%r0)
vstl %v0, %r0, -1
vstl %v0, %r0, 4096
- vstl %v0, %r0, 0(%r0)
#CHECK: error: invalid operand
#CHECK: vstm %v0, %v0, -1
#CHECK: ap 0(1,%r1), -1(1,%r1)
#CHECK: error: invalid operand
#CHECK: ap 0(1,%r1), 4096(1,%r1)
-#CHECK: error: %r0 used in an address
-#CHECK: ap 0(1,%r0), 0(1,%r1)
-#CHECK: error: %r0 used in an address
-#CHECK: ap 0(1,%r1), 0(1,%r0)
#CHECK: error: invalid use of indexed addressing
#CHECK: ap 0(%r1,%r2), 0(1,%r1)
#CHECK: error: invalid use of indexed addressing
ap 4096(1,%r1), 0(1,%r1)
ap 0(1,%r1), -1(1,%r1)
ap 0(1,%r1), 4096(1,%r1)
- ap 0(1,%r0), 0(1,%r1)
- ap 0(1,%r1), 0(1,%r0)
ap 0(%r1,%r2), 0(1,%r1)
ap 0(1,%r2), 0(%r1,%r2)
ap 0(-), 0(1)
#CHECK: clc 0(1,%r1), -1(%r1)
#CHECK: error: invalid operand
#CHECK: clc 0(1,%r1), 4096(%r1)
-#CHECK: error: %r0 used in an address
-#CHECK: clc 0(1,%r0), 0(%r1)
-#CHECK: error: %r0 used in an address
-#CHECK: clc 0(1,%r1), 0(%r0)
#CHECK: error: invalid use of indexed addressing
#CHECK: clc 0(%r1,%r2), 0(%r1)
#CHECK: error: invalid use of indexed addressing
clc 4096(1,%r1), 0(%r1)
clc 0(1,%r1), -1(%r1)
clc 0(1,%r1), 4096(%r1)
- clc 0(1,%r0), 0(%r1)
- clc 0(1,%r1), 0(%r0)
clc 0(%r1,%r2), 0(%r1)
clc 0(1,%r2), 0(%r1,%r2)
clc 0(-), 0
#CHECK: cp 0(1,%r1), -1(1,%r1)
#CHECK: error: invalid operand
#CHECK: cp 0(1,%r1), 4096(1,%r1)
-#CHECK: error: %r0 used in an address
-#CHECK: cp 0(1,%r0), 0(1,%r1)
-#CHECK: error: %r0 used in an address
-#CHECK: cp 0(1,%r1), 0(1,%r0)
#CHECK: error: invalid use of indexed addressing
#CHECK: cp 0(%r1,%r2), 0(1,%r1)
#CHECK: error: invalid use of indexed addressing
cp 4096(1,%r1), 0(1,%r1)
cp 0(1,%r1), -1(1,%r1)
cp 0(1,%r1), 4096(1,%r1)
- cp 0(1,%r0), 0(1,%r1)
- cp 0(1,%r1), 0(1,%r0)
cp 0(%r1,%r2), 0(1,%r1)
cp 0(1,%r2), 0(%r1,%r2)
cp 0(-), 0(1)
#CHECK: dp 0(1,%r1), -1(1,%r1)
#CHECK: error: invalid operand
#CHECK: dp 0(1,%r1), 4096(1,%r1)
-#CHECK: error: %r0 used in an address
-#CHECK: dp 0(1,%r0), 0(1,%r1)
-#CHECK: error: %r0 used in an address
-#CHECK: dp 0(1,%r1), 0(1,%r0)
#CHECK: error: invalid use of indexed addressing
#CHECK: dp 0(%r1,%r2), 0(1,%r1)
#CHECK: error: invalid use of indexed addressing
dp 4096(1,%r1), 0(1,%r1)
dp 0(1,%r1), -1(1,%r1)
dp 0(1,%r1), 4096(1,%r1)
- dp 0(1,%r0), 0(1,%r1)
- dp 0(1,%r1), 0(1,%r0)
dp 0(%r1,%r2), 0(1,%r1)
dp 0(1,%r2), 0(%r1,%r2)
dp 0(-), 0(1)
#CHECK: ed 0(1,%r1), -1(%r1)
#CHECK: error: invalid operand
#CHECK: ed 0(1,%r1), 4096(%r1)
-#CHECK: error: %r0 used in an address
-#CHECK: ed 0(1,%r0), 0(%r1)
-#CHECK: error: %r0 used in an address
-#CHECK: ed 0(1,%r1), 0(%r0)
#CHECK: error: invalid use of indexed addressing
#CHECK: ed 0(%r1,%r2), 0(%r1)
#CHECK: error: invalid use of indexed addressing
ed 4096(1,%r1), 0(%r1)
ed 0(1,%r1), -1(%r1)
ed 0(1,%r1), 4096(%r1)
- ed 0(1,%r0), 0(%r1)
- ed 0(1,%r1), 0(%r0)
ed 0(%r1,%r2), 0(%r1)
ed 0(1,%r2), 0(%r1,%r2)
ed 0(-), 0
#CHECK: edmk 0(1,%r1), -1(%r1)
#CHECK: error: invalid operand
#CHECK: edmk 0(1,%r1), 4096(%r1)
-#CHECK: error: %r0 used in an address
-#CHECK: edmk 0(1,%r0), 0(%r1)
-#CHECK: error: %r0 used in an address
-#CHECK: edmk 0(1,%r1), 0(%r0)
#CHECK: error: invalid use of indexed addressing
#CHECK: edmk 0(%r1,%r2), 0(%r1)
#CHECK: error: invalid use of indexed addressing
edmk 4096(1,%r1), 0(%r1)
edmk 0(1,%r1), -1(%r1)
edmk 0(1,%r1), 4096(%r1)
- edmk 0(1,%r0), 0(%r1)
- edmk 0(1,%r1), 0(%r0)
edmk 0(%r1,%r2), 0(%r1)
edmk 0(1,%r2), 0(%r1,%r2)
edmk 0(-), 0
#CHECK: mp 0(1,%r1), -1(1,%r1)
#CHECK: error: invalid operand
#CHECK: mp 0(1,%r1), 4096(1,%r1)
-#CHECK: error: %r0 used in an address
-#CHECK: mp 0(1,%r0), 0(1,%r1)
-#CHECK: error: %r0 used in an address
-#CHECK: mp 0(1,%r1), 0(1,%r0)
#CHECK: error: invalid use of indexed addressing
#CHECK: mp 0(%r1,%r2), 0(1,%r1)
#CHECK: error: invalid use of indexed addressing
mp 4096(1,%r1), 0(1,%r1)
mp 0(1,%r1), -1(1,%r1)
mp 0(1,%r1), 4096(1,%r1)
- mp 0(1,%r0), 0(1,%r1)
- mp 0(1,%r1), 0(1,%r0)
mp 0(%r1,%r2), 0(1,%r1)
mp 0(1,%r2), 0(%r1,%r2)
mp 0(-), 0(1)
#CHECK: mvc 0(1,%r1), -1(%r1)
#CHECK: error: invalid operand
#CHECK: mvc 0(1,%r1), 4096(%r1)
-#CHECK: error: %r0 used in an address
-#CHECK: mvc 0(1,%r0), 0(%r1)
-#CHECK: error: %r0 used in an address
-#CHECK: mvc 0(1,%r1), 0(%r0)
#CHECK: error: invalid use of indexed addressing
#CHECK: mvc 0(%r1,%r2), 0(%r1)
#CHECK: error: invalid use of indexed addressing
mvc 4096(1,%r1), 0(%r1)
mvc 0(1,%r1), -1(%r1)
mvc 0(1,%r1), 4096(%r1)
- mvc 0(1,%r0), 0(%r1)
- mvc 0(1,%r1), 0(%r0)
mvc 0(%r1,%r2), 0(%r1)
mvc 0(1,%r2), 0(%r1,%r2)
mvc 0(-), 0
#CHECK: mvcin 0(1,%r1), -1(%r1)
#CHECK: error: invalid operand
#CHECK: mvcin 0(1,%r1), 4096(%r1)
-#CHECK: error: %r0 used in an address
-#CHECK: mvcin 0(1,%r0), 0(%r1)
-#CHECK: error: %r0 used in an address
-#CHECK: mvcin 0(1,%r1), 0(%r0)
#CHECK: error: invalid use of indexed addressing
#CHECK: mvcin 0(%r1,%r2), 0(%r1)
#CHECK: error: invalid use of indexed addressing
mvcin 4096(1,%r1), 0(%r1)
mvcin 0(1,%r1), -1(%r1)
mvcin 0(1,%r1), 4096(%r1)
- mvcin 0(1,%r0), 0(%r1)
- mvcin 0(1,%r1), 0(%r0)
mvcin 0(%r1,%r2), 0(%r1)
mvcin 0(1,%r2), 0(%r1,%r2)
mvcin 0(-), 0
#CHECK: mvck 0(%r1,%r1), -1(%r1), %r3
#CHECK: error: invalid operand
#CHECK: mvck 0(%r1,%r1), 4096(%r1), %r3
-#CHECK: error: %r0 used in an address
-#CHECK: mvck 0(%r1,%r0), 0(%r1), %r3
-#CHECK: error: %r0 used in an address
-#CHECK: mvck 0(%r1,%r1), 0(%r0), %r3
#CHECK: error: invalid use of indexed addressing
#CHECK: mvck 0(%r1,%r2), 0(%r1,%r2), %r3
#CHECK: error: unknown token in expression
mvck 4096(%r1,%r1), 0(%r1), %r3
mvck 0(%r1,%r1), -1(%r1), %r3
mvck 0(%r1,%r1), 4096(%r1), %r3
- mvck 0(%r1,%r0), 0(%r1), %r3
- mvck 0(%r1,%r1), 0(%r0), %r3
mvck 0(%r1,%r2), 0(%r1,%r2), %r3
mvck 0(-), 0, %r3
#CHECK: mvcp 0(%r1,%r1), -1(%r1), %r3
#CHECK: error: invalid operand
#CHECK: mvcp 0(%r1,%r1), 4096(%r1), %r3
-#CHECK: error: %r0 used in an address
-#CHECK: mvcp 0(%r1,%r0), 0(%r1), %r3
-#CHECK: error: %r0 used in an address
-#CHECK: mvcp 0(%r1,%r1), 0(%r0), %r3
#CHECK: error: invalid use of indexed addressing
#CHECK: mvcp 0(%r1,%r2), 0(%r1,%r2), %r3
#CHECK: error: unknown token in expression
mvcp 4096(%r1,%r1), 0(%r1), %r3
mvcp 0(%r1,%r1), -1(%r1), %r3
mvcp 0(%r1,%r1), 4096(%r1), %r3
- mvcp 0(%r1,%r0), 0(%r1), %r3
- mvcp 0(%r1,%r1), 0(%r0), %r3
mvcp 0(%r1,%r2), 0(%r1,%r2), %r3
mvcp 0(-), 0, %r3
#CHECK: mvcs 0(%r1,%r1), -1(%r1), %r3
#CHECK: error: invalid operand
#CHECK: mvcs 0(%r1,%r1), 4096(%r1), %r3
-#CHECK: error: %r0 used in an address
-#CHECK: mvcs 0(%r1,%r0), 0(%r1), %r3
-#CHECK: error: %r0 used in an address
-#CHECK: mvcs 0(%r1,%r1), 0(%r0), %r3
#CHECK: error: invalid use of indexed addressing
#CHECK: mvcs 0(%r1,%r2), 0(%r1,%r2), %r3
#CHECK: error: unknown token in expression
mvcs 4096(%r1,%r1), 0(%r1), %r3
mvcs 0(%r1,%r1), -1(%r1), %r3
mvcs 0(%r1,%r1), 4096(%r1), %r3
- mvcs 0(%r1,%r0), 0(%r1), %r3
- mvcs 0(%r1,%r1), 0(%r0), %r3
mvcs 0(%r1,%r2), 0(%r1,%r2), %r3
mvcs 0(-), 0, %r3
#CHECK: mvn 0(1,%r1), -1(%r1)
#CHECK: error: invalid operand
#CHECK: mvn 0(1,%r1), 4096(%r1)
-#CHECK: error: %r0 used in an address
-#CHECK: mvn 0(1,%r0), 0(%r1)
-#CHECK: error: %r0 used in an address
-#CHECK: mvn 0(1,%r1), 0(%r0)
#CHECK: error: invalid use of indexed addressing
#CHECK: mvn 0(%r1,%r2), 0(%r1)
#CHECK: error: invalid use of indexed addressing
mvn 4096(1,%r1), 0(%r1)
mvn 0(1,%r1), -1(%r1)
mvn 0(1,%r1), 4096(%r1)
- mvn 0(1,%r0), 0(%r1)
- mvn 0(1,%r1), 0(%r0)
mvn 0(%r1,%r2), 0(%r1)
mvn 0(1,%r2), 0(%r1,%r2)
mvn 0(-), 0
#CHECK: mvo 0(1,%r1), -1(1,%r1)
#CHECK: error: invalid operand
#CHECK: mvo 0(1,%r1), 4096(1,%r1)
-#CHECK: error: %r0 used in an address
-#CHECK: mvo 0(1,%r0), 0(1,%r1)
-#CHECK: error: %r0 used in an address
-#CHECK: mvo 0(1,%r1), 0(1,%r0)
#CHECK: error: invalid use of indexed addressing
#CHECK: mvo 0(%r1,%r2), 0(1,%r1)
#CHECK: error: invalid use of indexed addressing
mvo 4096(1,%r1), 0(1,%r1)
mvo 0(1,%r1), -1(1,%r1)
mvo 0(1,%r1), 4096(1,%r1)
- mvo 0(1,%r0), 0(1,%r1)
- mvo 0(1,%r1), 0(1,%r0)
mvo 0(%r1,%r2), 0(1,%r1)
mvo 0(1,%r2), 0(%r1,%r2)
mvo 0(-), 0(1)
#CHECK: mvz 0(1,%r1), -1(%r1)
#CHECK: error: invalid operand
#CHECK: mvz 0(1,%r1), 4096(%r1)
-#CHECK: error: %r0 used in an address
-#CHECK: mvz 0(1,%r0), 0(%r1)
-#CHECK: error: %r0 used in an address
-#CHECK: mvz 0(1,%r1), 0(%r0)
#CHECK: error: invalid use of indexed addressing
#CHECK: mvz 0(%r1,%r2), 0(%r1)
#CHECK: error: invalid use of indexed addressing
mvz 4096(1,%r1), 0(%r1)
mvz 0(1,%r1), -1(%r1)
mvz 0(1,%r1), 4096(%r1)
- mvz 0(1,%r0), 0(%r1)
- mvz 0(1,%r1), 0(%r0)
mvz 0(%r1,%r2), 0(%r1)
mvz 0(1,%r2), 0(%r1,%r2)
mvz 0(-), 0
#CHECK: nc 0(1,%r1), -1(%r1)
#CHECK: error: invalid operand
#CHECK: nc 0(1,%r1), 4096(%r1)
-#CHECK: error: %r0 used in an address
-#CHECK: nc 0(1,%r0), 0(%r1)
-#CHECK: error: %r0 used in an address
-#CHECK: nc 0(1,%r1), 0(%r0)
#CHECK: error: invalid use of indexed addressing
#CHECK: nc 0(%r1,%r2), 0(%r1)
#CHECK: error: invalid use of indexed addressing
nc 4096(1,%r1), 0(%r1)
nc 0(1,%r1), -1(%r1)
nc 0(1,%r1), 4096(%r1)
- nc 0(1,%r0), 0(%r1)
- nc 0(1,%r1), 0(%r0)
nc 0(%r1,%r2), 0(%r1)
nc 0(1,%r2), 0(%r1,%r2)
nc 0(-), 0
#CHECK: oc 0(1,%r1), -1(%r1)
#CHECK: error: invalid operand
#CHECK: oc 0(1,%r1), 4096(%r1)
-#CHECK: error: %r0 used in an address
-#CHECK: oc 0(1,%r0), 0(%r1)
-#CHECK: error: %r0 used in an address
-#CHECK: oc 0(1,%r1), 0(%r0)
#CHECK: error: invalid use of indexed addressing
#CHECK: oc 0(%r1,%r2), 0(%r1)
#CHECK: error: invalid use of indexed addressing
oc 4096(1,%r1), 0(%r1)
oc 0(1,%r1), -1(%r1)
oc 0(1,%r1), 4096(%r1)
- oc 0(1,%r0), 0(%r1)
- oc 0(1,%r1), 0(%r0)
oc 0(%r1,%r2), 0(%r1)
oc 0(1,%r2), 0(%r1,%r2)
oc 0(-), 0
#CHECK: pack 0(1,%r1), -1(1,%r1)
#CHECK: error: invalid operand
#CHECK: pack 0(1,%r1), 4096(1,%r1)
-#CHECK: error: %r0 used in an address
-#CHECK: pack 0(1,%r0), 0(1,%r1)
-#CHECK: error: %r0 used in an address
-#CHECK: pack 0(1,%r1), 0(1,%r0)
#CHECK: error: invalid use of indexed addressing
#CHECK: pack 0(%r1,%r2), 0(1,%r1)
#CHECK: error: invalid use of indexed addressing
pack 4096(1,%r1), 0(1,%r1)
pack 0(1,%r1), -1(1,%r1)
pack 0(1,%r1), 4096(1,%r1)
- pack 0(1,%r0), 0(1,%r1)
- pack 0(1,%r1), 0(1,%r0)
pack 0(%r1,%r2), 0(1,%r1)
pack 0(1,%r2), 0(%r1,%r2)
pack 0(-), 0(1)
#CHECK: pka 0(%r1), -1(1,%r1)
#CHECK: error: invalid operand
#CHECK: pka 0(%r1), 4096(1,%r1)
-#CHECK: error: %r0 used in an address
-#CHECK: pka 0(%r0), 0(1,%r1)
-#CHECK: error: %r0 used in an address
-#CHECK: pka 0(%r1), 0(1,%r0)
#CHECK: error: invalid use of indexed addressing
#CHECK: pka 0(%r1,%r2), 0(1,%r1)
#CHECK: error: invalid use of indexed addressing
pka 4096(%r1), 0(1,%r1)
pka 0(%r1), -1(1,%r1)
pka 0(%r1), 4096(1,%r1)
- pka 0(%r0), 0(1,%r1)
- pka 0(%r1), 0(1,%r0)
pka 0(%r1,%r2), 0(1,%r1)
pka 0(%r2), 0(%r1,%r2)
pka 0, 0(-)
#CHECK: pku 0(%r1), -1(1,%r1)
#CHECK: error: invalid operand
#CHECK: pku 0(%r1), 4096(1,%r1)
-#CHECK: error: %r0 used in an address
-#CHECK: pku 0(%r0), 0(1,%r1)
-#CHECK: error: %r0 used in an address
-#CHECK: pku 0(%r1), 0(1,%r0)
#CHECK: error: invalid use of indexed addressing
#CHECK: pku 0(%r1,%r2), 0(1,%r1)
#CHECK: error: invalid use of indexed addressing
#CHECK: rll %r0,%r0,-524289
#CHECK: error: invalid operand
#CHECK: rll %r0,%r0,524288
-#CHECK: error: %r0 used in an address
-#CHECK: rll %r0,%r0,0(%r0)
#CHECK: error: invalid use of indexed addressing
#CHECK: rll %r0,%r0,0(%r1,%r2)
rll %r0,%r0,-524289
rll %r0,%r0,524288
- rll %r0,%r0,0(%r0)
rll %r0,%r0,0(%r1,%r2)
#CHECK: error: invalid operand
#CHECK: rllg %r0,%r0,-524289
#CHECK: error: invalid operand
#CHECK: rllg %r0,%r0,524288
-#CHECK: error: %r0 used in an address
-#CHECK: rllg %r0,%r0,0(%r0)
#CHECK: error: invalid use of indexed addressing
#CHECK: rllg %r0,%r0,0(%r1,%r2)
rllg %r0,%r0,-524289
rllg %r0,%r0,524288
- rllg %r0,%r0,0(%r0)
rllg %r0,%r0,0(%r1,%r2)
#CHECK: error: invalid operand
#CHECK: sla %r0,-1
#CHECK: error: invalid operand
#CHECK: sla %r0,4096
-#CHECK: error: %r0 used in an address
-#CHECK: sla %r0,0(%r0)
#CHECK: error: invalid use of indexed addressing
#CHECK: sla %r0,0(%r1,%r2)
sla %r0,-1
sla %r0,4096
- sla %r0,0(%r0)
sla %r0,0(%r1,%r2)
#CHECK: error: invalid operand
#CHECK: slag %r0,%r0,-524289
#CHECK: error: invalid operand
#CHECK: slag %r0,%r0,524288
-#CHECK: error: %r0 used in an address
-#CHECK: slag %r0,%r0,0(%r0)
#CHECK: error: invalid use of indexed addressing
#CHECK: slag %r0,%r0,0(%r1,%r2)
slag %r0,%r0,-524289
slag %r0,%r0,524288
- slag %r0,%r0,0(%r0)
slag %r0,%r0,0(%r1,%r2)
#CHECK: error: instruction requires: distinct-ops
#CHECK: slda %r0,-1
#CHECK: error: invalid operand
#CHECK: slda %r0,4096
-#CHECK: error: %r0 used in an address
-#CHECK: slda %r0,0(%r0)
#CHECK: error: invalid use of indexed addressing
#CHECK: slda %r0,0(%r1,%r2)
slda %r1,0
slda %r0,-1
slda %r0,4096
- slda %r0,0(%r0)
slda %r0,0(%r1,%r2)
#CHECK: error: invalid register pair
#CHECK: sldl %r0,-1
#CHECK: error: invalid operand
#CHECK: sldl %r0,4096
-#CHECK: error: %r0 used in an address
-#CHECK: sldl %r0,0(%r0)
#CHECK: error: invalid use of indexed addressing
#CHECK: sldl %r0,0(%r1,%r2)
sldl %r1,0
sldl %r0,-1
sldl %r0,4096
- sldl %r0,0(%r0)
sldl %r0,0(%r1,%r2)
#CHECK: error: invalid operand
#CHECK: sll %r0,-1
#CHECK: error: invalid operand
#CHECK: sll %r0,4096
-#CHECK: error: %r0 used in an address
-#CHECK: sll %r0,0(%r0)
#CHECK: error: invalid use of indexed addressing
#CHECK: sll %r0,0(%r1,%r2)
sll %r0,-1
sll %r0,4096
- sll %r0,0(%r0)
sll %r0,0(%r1,%r2)
#CHECK: error: invalid operand
#CHECK: sllg %r0,%r0,-524289
#CHECK: error: invalid operand
#CHECK: sllg %r0,%r0,524288
-#CHECK: error: %r0 used in an address
-#CHECK: sllg %r0,%r0,0(%r0)
#CHECK: error: invalid use of indexed addressing
#CHECK: sllg %r0,%r0,0(%r1,%r2)
sllg %r0,%r0,-524289
sllg %r0,%r0,524288
- sllg %r0,%r0,0(%r0)
sllg %r0,%r0,0(%r1,%r2)
#CHECK: error: instruction requires: distinct-ops
#CHECK: sp 0(1,%r1), -1(1,%r1)
#CHECK: error: invalid operand
#CHECK: sp 0(1,%r1), 4096(1,%r1)
-#CHECK: error: %r0 used in an address
-#CHECK: sp 0(1,%r0), 0(1,%r1)
-#CHECK: error: %r0 used in an address
-#CHECK: sp 0(1,%r1), 0(1,%r0)
#CHECK: error: invalid use of indexed addressing
#CHECK: sp 0(%r1,%r2), 0(1,%r1)
#CHECK: error: invalid use of indexed addressing
sp 4096(1,%r1), 0(1,%r1)
sp 0(1,%r1), -1(1,%r1)
sp 0(1,%r1), 4096(1,%r1)
- sp 0(1,%r0), 0(1,%r1)
- sp 0(1,%r1), 0(1,%r0)
sp 0(%r1,%r2), 0(1,%r1)
sp 0(1,%r2), 0(%r1,%r2)
sp 0(-), 0(1)
#CHECK: sra %r0,-1
#CHECK: error: invalid operand
#CHECK: sra %r0,4096
-#CHECK: error: %r0 used in an address
-#CHECK: sra %r0,0(%r0)
#CHECK: error: invalid use of indexed addressing
#CHECK: sra %r0,0(%r1,%r2)
#CHECK: srag %r0,%r0,-524289
#CHECK: error: invalid operand
#CHECK: srag %r0,%r0,524288
-#CHECK: error: %r0 used in an address
-#CHECK: srag %r0,%r0,0(%r0)
#CHECK: error: invalid use of indexed addressing
#CHECK: srag %r0,%r0,0(%r1,%r2)
#CHECK: srda %r0,-1
#CHECK: error: invalid operand
#CHECK: srda %r0,4096
-#CHECK: error: %r0 used in an address
-#CHECK: srda %r0,0(%r0)
#CHECK: error: invalid use of indexed addressing
#CHECK: srda %r0,0(%r1,%r2)
srda %r1,0
srda %r0,-1
srda %r0,4096
- srda %r0,0(%r0)
srda %r0,0(%r1,%r2)
#CHECK: error: invalid register pair
#CHECK: srdl %r0,-1
#CHECK: error: invalid operand
#CHECK: srdl %r0,4096
-#CHECK: error: %r0 used in an address
-#CHECK: srdl %r0,0(%r0)
#CHECK: error: invalid use of indexed addressing
#CHECK: srdl %r0,0(%r1,%r2)
srdl %r1,0
srdl %r0,-1
srdl %r0,4096
- srdl %r0,0(%r0)
srdl %r0,0(%r1,%r2)
#CHECK: error: invalid operand
#CHECK: srl %r0,-1
#CHECK: error: invalid operand
#CHECK: srl %r0,4096
-#CHECK: error: %r0 used in an address
-#CHECK: srl %r0,0(%r0)
#CHECK: error: invalid use of indexed addressing
#CHECK: srl %r0,0(%r1,%r2)
srl %r0,-1
srl %r0,4096
- srl %r0,0(%r0)
srl %r0,0(%r1,%r2)
#CHECK: error: invalid operand
#CHECK: srlg %r0,%r0,-524289
#CHECK: error: invalid operand
#CHECK: srlg %r0,%r0,524288
-#CHECK: error: %r0 used in an address
-#CHECK: srlg %r0,%r0,0(%r0)
#CHECK: error: invalid use of indexed addressing
#CHECK: srlg %r0,%r0,0(%r1,%r2)
srlg %r0,%r0,-524289
srlg %r0,%r0,524288
- srlg %r0,%r0,0(%r0)
srlg %r0,%r0,0(%r1,%r2)
#CHECK: error: instruction requires: distinct-ops
#CHECK: srp 0(1,%r1), -1(%r1), 0
#CHECK: error: invalid operand
#CHECK: srp 0(1,%r1), 4096(%r1), 0
-#CHECK: error: %r0 used in an address
-#CHECK: srp 0(1,%r0), 0(%r1), 0
-#CHECK: error: %r0 used in an address
-#CHECK: srp 0(1,%r1), 0(%r0), 0
#CHECK: error: invalid use of indexed addressing
#CHECK: srp 0(%r1,%r2), 0(%r1), 0
#CHECK: error: invalid use of indexed addressing
srp 4096(1,%r1), 0(%r1), 0
srp 0(1,%r1), -1(%r1), 0
srp 0(1,%r1), 4096(%r1), 0
- srp 0(1,%r0), 0(%r1), 0
- srp 0(1,%r1), 0(%r0), 0
srp 0(%r1,%r2), 0(%r1), 0
srp 0(1,%r2), 0(%r1,%r2), 0
srp 0(1), 0, -1
#CHECK: tp -1(1,%r1)
#CHECK: error: invalid operand
#CHECK: tp 4096(1,%r1)
-#CHECK: error: %r0 used in an address
-#CHECK: tp 0(1,%r0)
#CHECK: error: invalid use of indexed addressing
#CHECK: tp 0(%r1,%r2)
#CHECK: error: unknown token in expression
tp 0(17,%r1)
tp -1(1,%r1)
tp 4096(1,%r1)
- tp 0(1,%r0)
tp 0(%r1,%r2)
tp 0(-)
#CHECK: tr 0(1,%r1), -1(%r1)
#CHECK: error: invalid operand
#CHECK: tr 0(1,%r1), 4096(%r1)
-#CHECK: error: %r0 used in an address
-#CHECK: tr 0(1,%r0), 0(%r1)
-#CHECK: error: %r0 used in an address
-#CHECK: tr 0(1,%r1), 0(%r0)
#CHECK: error: invalid use of indexed addressing
#CHECK: tr 0(%r1,%r2), 0(%r1)
#CHECK: error: invalid use of indexed addressing
tr 4096(1,%r1), 0(%r1)
tr 0(1,%r1), -1(%r1)
tr 0(1,%r1), 4096(%r1)
- tr 0(1,%r0), 0(%r1)
- tr 0(1,%r1), 0(%r0)
tr 0(%r1,%r2), 0(%r1)
tr 0(1,%r2), 0(%r1,%r2)
tr 0(-), 0
#CHECK: trt 0(1,%r1), -1(%r1)
#CHECK: error: invalid operand
#CHECK: trt 0(1,%r1), 4096(%r1)
-#CHECK: error: %r0 used in an address
-#CHECK: trt 0(1,%r0), 0(%r1)
-#CHECK: error: %r0 used in an address
-#CHECK: trt 0(1,%r1), 0(%r0)
#CHECK: error: invalid use of indexed addressing
#CHECK: trt 0(%r1,%r2), 0(%r1)
#CHECK: error: invalid use of indexed addressing
trt 4096(1,%r1), 0(%r1)
trt 0(1,%r1), -1(%r1)
trt 0(1,%r1), 4096(%r1)
- trt 0(1,%r0), 0(%r1)
- trt 0(1,%r1), 0(%r0)
trt 0(%r1,%r2), 0(%r1)
trt 0(1,%r2), 0(%r1,%r2)
trt 0(-), 0
#CHECK: trtr 0(1,%r1), -1(%r1)
#CHECK: error: invalid operand
#CHECK: trtr 0(1,%r1), 4096(%r1)
-#CHECK: error: %r0 used in an address
-#CHECK: trtr 0(1,%r0), 0(%r1)
-#CHECK: error: %r0 used in an address
-#CHECK: trtr 0(1,%r1), 0(%r0)
#CHECK: error: invalid use of indexed addressing
#CHECK: trtr 0(%r1,%r2), 0(%r1)
#CHECK: error: invalid use of indexed addressing
trtr 4096(1,%r1), 0(%r1)
trtr 0(1,%r1), -1(%r1)
trtr 0(1,%r1), 4096(%r1)
- trtr 0(1,%r0), 0(%r1)
- trtr 0(1,%r1), 0(%r0)
trtr 0(%r1,%r2), 0(%r1)
trtr 0(1,%r2), 0(%r1,%r2)
trtr 0(-), 0
#CHECK: unpk 0(1,%r1), -1(1,%r1)
#CHECK: error: invalid operand
#CHECK: unpk 0(1,%r1), 4096(1,%r1)
-#CHECK: error: %r0 used in an address
-#CHECK: unpk 0(1,%r0), 0(1,%r1)
-#CHECK: error: %r0 used in an address
-#CHECK: unpk 0(1,%r1), 0(1,%r0)
#CHECK: error: invalid use of indexed addressing
#CHECK: unpk 0(%r1,%r2), 0(1,%r1)
#CHECK: error: invalid use of indexed addressing
unpk 4096(1,%r1), 0(1,%r1)
unpk 0(1,%r1), -1(1,%r1)
unpk 0(1,%r1), 4096(1,%r1)
- unpk 0(1,%r0), 0(1,%r1)
- unpk 0(1,%r1), 0(1,%r0)
unpk 0(%r1,%r2), 0(1,%r1)
unpk 0(1,%r2), 0(%r1,%r2)
unpk 0(-), 0(1)
#CHECK: unpka 0(1,%r1), -1(%r1)
#CHECK: error: invalid operand
#CHECK: unpka 0(1,%r1), 4096(%r1)
-#CHECK: error: %r0 used in an address
-#CHECK: unpka 0(1,%r0), 0(%r1)
-#CHECK: error: %r0 used in an address
-#CHECK: unpka 0(1,%r1), 0(%r0)
#CHECK: error: invalid use of indexed addressing
#CHECK: unpka 0(%r1,%r2), 0(%r1)
#CHECK: error: invalid use of indexed addressing
unpka 4096(1,%r1), 0(%r1)
unpka 0(1,%r1), -1(%r1)
unpka 0(1,%r1), 4096(%r1)
- unpka 0(1,%r0), 0(%r1)
- unpka 0(1,%r1), 0(%r0)
unpka 0(%r1,%r2), 0(%r1)
unpka 0(1,%r2), 0(%r1,%r2)
unpka 0(-), 0
#CHECK: unpku 0(1,%r1), -1(%r1)
#CHECK: error: invalid operand
#CHECK: unpku 0(1,%r1), 4096(%r1)
-#CHECK: error: %r0 used in an address
-#CHECK: unpku 0(1,%r0), 0(%r1)
-#CHECK: error: %r0 used in an address
-#CHECK: unpku 0(1,%r1), 0(%r0)
#CHECK: error: invalid use of indexed addressing
#CHECK: unpku 0(%r1,%r2), 0(%r1)
#CHECK: error: invalid use of indexed addressing
unpku 4096(1,%r1), 0(%r1)
unpku 0(1,%r1), -1(%r1)
unpku 0(1,%r1), 4096(%r1)
- unpku 0(1,%r0), 0(%r1)
- unpku 0(1,%r1), 0(%r0)
unpku 0(%r1,%r2), 0(%r1)
unpku 0(1,%r2), 0(%r1,%r2)
unpku 0(-), 0
#CHECK: xc 0(1,%r1), -1(%r1)
#CHECK: error: invalid operand
#CHECK: xc 0(1,%r1), 4096(%r1)
-#CHECK: error: %r0 used in an address
-#CHECK: xc 0(1,%r0), 0(%r1)
-#CHECK: error: %r0 used in an address
-#CHECK: xc 0(1,%r1), 0(%r0)
#CHECK: error: invalid use of indexed addressing
#CHECK: xc 0(%r1,%r2), 0(%r1)
#CHECK: error: invalid use of indexed addressing
xc 4096(1,%r1), 0(%r1)
xc 0(1,%r1), -1(%r1)
xc 0(1,%r1), 4096(%r1)
- xc 0(1,%r0), 0(%r1)
- xc 0(1,%r1), 0(%r0)
xc 0(%r1,%r2), 0(%r1)
xc 0(1,%r2), 0(%r1,%r2)
xc 0(-), 0
#CHECK: zap 0(1,%r1), -1(1,%r1)
#CHECK: error: invalid operand
#CHECK: zap 0(1,%r1), 4096(1,%r1)
-#CHECK: error: %r0 used in an address
-#CHECK: zap 0(1,%r0), 0(1,%r1)
-#CHECK: error: %r0 used in an address
-#CHECK: zap 0(1,%r1), 0(1,%r0)
#CHECK: error: invalid use of indexed addressing
#CHECK: zap 0(%r1,%r2), 0(1,%r1)
#CHECK: error: invalid use of indexed addressing
zap 4096(1,%r1), 0(1,%r1)
zap 0(1,%r1), -1(1,%r1)
zap 0(1,%r1), 4096(1,%r1)
- zap 0(1,%r0), 0(1,%r1)
- zap 0(1,%r1), 0(1,%r0)
zap 0(%r1,%r2), 0(1,%r1)
zap 0(1,%r2), 0(%r1,%r2)
zap 0(-), 0(1)
bal %r14, 4095(%r1,%r15)
bal %r15, 4095(%r15,%r1)
-#CHECK: balr %r0, %r1 # encoding: [0x05,0x01]
+#CHECK: balr %r0, %r0 # encoding: [0x05,0x00]
#CHECK: balr %r0, %r15 # encoding: [0x05,0x0f]
#CHECK: balr %r14, %r9 # encoding: [0x05,0xe9]
#CHECK: balr %r15, %r1 # encoding: [0x05,0xf1]
- balr %r0,%r1
+ balr %r0,%r0
balr %r0,%r15
balr %r14,%r9
balr %r15,%r1
bas %r14, 4095(%r1,%r15)
bas %r15, 4095(%r15,%r1)
-#CHECK: basr %r0, %r1 # encoding: [0x0d,0x01]
+#CHECK: basr %r0, %r0 # encoding: [0x0d,0x00]
#CHECK: basr %r0, %r15 # encoding: [0x0d,0x0f]
#CHECK: basr %r14, %r9 # encoding: [0x0d,0xe9]
#CHECK: basr %r15, %r1 # encoding: [0x0d,0xf1]
- basr %r0,%r1
+ basr %r0,%r0
basr %r0,%r15
basr %r14,%r9
basr %r15,%r1
-#CHECK: bassm %r0, %r1 # encoding: [0x0c,0x01]
+#CHECK: bassm %r0, %r0 # encoding: [0x0c,0x00]
#CHECK: bassm %r0, %r15 # encoding: [0x0c,0x0f]
#CHECK: bassm %r14, %r9 # encoding: [0x0c,0xe9]
#CHECK: bassm %r15, %r1 # encoding: [0x0c,0xf1]
- bassm %r0,%r1
+ bassm %r0,%r0
bassm %r0,%r15
bassm %r14,%r9
bassm %r15,%r1
bsg %r15,%r0
bsg %r7,%r8
-#CHECK: bsm %r0, %r1 # encoding: [0x0b,0x01]
+#CHECK: bsm %r0, %r0 # encoding: [0x0b,0x00]
#CHECK: bsm %r0, %r15 # encoding: [0x0b,0x0f]
#CHECK: bsm %r14, %r9 # encoding: [0x0b,0xe9]
#CHECK: bsm %r15, %r1 # encoding: [0x0b,0xf1]
- bsm %r0,%r1
+ bsm %r0,%r0
bsm %r0,%r15
bsm %r14,%r9
bsm %r15,%r1
bcr 0, %r15
#CHECK: bcr 1, %r7 # encoding: [0x07,0x17]
+#CHECK: bor %r0 # encoding: [0x07,0x10]
#CHECK: bor %r15 # encoding: [0x07,0x1f]
bcr 1, %r7
+ bor %r0
bor %r15
#CHECK: bcr 2, %r7 # encoding: [0x07,0x27]
+#CHECK: bhr %r0 # encoding: [0x07,0x20]
#CHECK: bhr %r15 # encoding: [0x07,0x2f]
bcr 2, %r7
+ bhr %r0
bhr %r15
#CHECK: bcr 3, %r7 # encoding: [0x07,0x37]
+#CHECK: bnler %r0 # encoding: [0x07,0x30]
#CHECK: bnler %r15 # encoding: [0x07,0x3f]
bcr 3, %r7
+ bnler %r0
bnler %r15
#CHECK: bcr 4, %r7 # encoding: [0x07,0x47]
+#CHECK: blr %r0 # encoding: [0x07,0x40]
#CHECK: blr %r15 # encoding: [0x07,0x4f]
bcr 4, %r7
+ blr %r0
blr %r15
#CHECK: bcr 5, %r7 # encoding: [0x07,0x57]
+#CHECK: bnher %r0 # encoding: [0x07,0x50]
#CHECK: bnher %r15 # encoding: [0x07,0x5f]
bcr 5, %r7
+ bnher %r0
bnher %r15
#CHECK: bcr 6, %r7 # encoding: [0x07,0x67]
+#CHECK: blhr %r0 # encoding: [0x07,0x60]
#CHECK: blhr %r15 # encoding: [0x07,0x6f]
bcr 6, %r7
+ blhr %r0
blhr %r15
#CHECK: bcr 7, %r7 # encoding: [0x07,0x77]
+#CHECK: bner %r0 # encoding: [0x07,0x70]
#CHECK: bner %r15 # encoding: [0x07,0x7f]
bcr 7, %r7
+ bner %r0
bner %r15
#CHECK: bcr 8, %r7 # encoding: [0x07,0x87]
+#CHECK: ber %r0 # encoding: [0x07,0x80]
#CHECK: ber %r15 # encoding: [0x07,0x8f]
bcr 8, %r7
+ ber %r0
ber %r15
#CHECK: bcr 9, %r7 # encoding: [0x07,0x97]
+#CHECK: bnlhr %r0 # encoding: [0x07,0x90]
#CHECK: bnlhr %r15 # encoding: [0x07,0x9f]
bcr 9, %r7
+ bnlhr %r0
bnlhr %r15
#CHECK: bcr 10, %r7 # encoding: [0x07,0xa7]
+#CHECK: bher %r0 # encoding: [0x07,0xa0]
#CHECK: bher %r15 # encoding: [0x07,0xaf]
bcr 10, %r7
+ bher %r0
bher %r15
#CHECK: bcr 11, %r7 # encoding: [0x07,0xb7]
+#CHECK: bnlr %r0 # encoding: [0x07,0xb0]
#CHECK: bnlr %r15 # encoding: [0x07,0xbf]
bcr 11, %r7
+ bnlr %r0
bnlr %r15
#CHECK: bcr 12, %r7 # encoding: [0x07,0xc7]
+#CHECK: bler %r0 # encoding: [0x07,0xc0]
#CHECK: bler %r15 # encoding: [0x07,0xcf]
bcr 12, %r7
+ bler %r0
bler %r15
#CHECK: bcr 13, %r7 # encoding: [0x07,0xd7]
+#CHECK: bnhr %r0 # encoding: [0x07,0xd0]
#CHECK: bnhr %r15 # encoding: [0x07,0xdf]
bcr 13, %r7
+ bnhr %r0
bnhr %r15
#CHECK: bcr 14, %r7 # encoding: [0x07,0xe7]
+#CHECK: bnor %r0 # encoding: [0x07,0xe0]
#CHECK: bnor %r15 # encoding: [0x07,0xef]
bcr 14, %r7
+ bnor %r0
bnor %r15
#CHECK: bcr 15, %r7 # encoding: [0x07,0xf7]
+#CHECK: br %r0 # encoding: [0x07,0xf0]
#CHECK: br %r1 # encoding: [0x07,0xf1]
#CHECK: br %r14 # encoding: [0x07,0xfe]
#CHECK: br %r15 # encoding: [0x07,0xff]
bcr 15, %r7
+ br %r0
br %r1
br %r14
br %r15
#CHECK: l %r0, 0 # encoding: [0x58,0x00,0x00,0x00]
#CHECK: l %r0, 4095 # encoding: [0x58,0x00,0x0f,0xff]
+#CHECK: l %r0, 0(%r0) # encoding: [0x58,0x00,0x00,0x00]
#CHECK: l %r0, 0(%r1) # encoding: [0x58,0x00,0x10,0x00]
#CHECK: l %r0, 0(%r15) # encoding: [0x58,0x00,0xf0,0x00]
+#CHECK: l %r0, 4095(%r0,%r15) # encoding: [0x58,0x00,0xff,0xff]
#CHECK: l %r0, 4095(%r1,%r15) # encoding: [0x58,0x01,0xff,0xff]
+#CHECK: l %r0, 4095(%r15,%r0) # encoding: [0x58,0x0f,0x0f,0xff]
#CHECK: l %r0, 4095(%r15,%r1) # encoding: [0x58,0x0f,0x1f,0xff]
#CHECK: l %r15, 0 # encoding: [0x58,0xf0,0x00,0x00]
l %r0, 0
l %r0, 4095
+ l %r0, 0(%r0)
l %r0, 0(%r1)
l %r0, 0(%r15)
+ l %r0, 4095(%r0,%r15)
l %r0, 4095(%r1,%r15)
+ l %r0, 4095(%r15,%r0)
l %r0, 4095(%r15,%r1)
l %r15, 0