ASoC: SOF: Intel: define and set power_down_dsp op for HDA platforms
authorFred Oh <fred.oh@linux.intel.com>
Thu, 22 Sep 2022 21:36:36 +0000 (14:36 -0700)
committerMark Brown <broonie@kernel.org>
Fri, 23 Sep 2022 12:56:13 +0000 (13:56 +0100)
hda_power_down_dsp is set for power_down_dsp op for all HDA platforms.

Signed-off-by: Fred Oh <fred.oh@linux.intel.com>
Reviewed-by: Rander Wang <rander.wang@intel.com>
Reviewed-by: Bard Liao <yung-chuan.liao@linux.intel.com>
Signed-off-by: Ranjani Sridharan <ranjani.sridharan@linux.intel.com>
Link: https://lore.kernel.org/r/20220922213644.666315-3-ranjani.sridharan@linux.intel.com
Signed-off-by: Mark Brown <broonie@kernel.org>
sound/soc/sof/intel/apl.c
sound/soc/sof/intel/cnl.c
sound/soc/sof/intel/hda.c
sound/soc/sof/intel/hda.h
sound/soc/sof/intel/icl.c
sound/soc/sof/intel/skl.c
sound/soc/sof/intel/tgl.c

index 295df44..886eb79 100644 (file)
@@ -104,6 +104,7 @@ const struct sof_intel_dsp_desc apl_chip_info = {
        .quirks = SOF_INTEL_PROCEN_FMT_QUIRK,
        .check_ipc_irq  = hda_dsp_check_ipc_irq,
        .cl_init = cl_dsp_init,
+       .power_down_dsp = hda_power_down_dsp,
        .hw_ip_version = SOF_INTEL_CAVS_1_5_PLUS,
 };
 EXPORT_SYMBOL_NS(apl_chip_info, SND_SOC_SOF_INTEL_HDA_COMMON);
index 180001d..dbdd969 100644 (file)
@@ -412,6 +412,7 @@ const struct sof_intel_dsp_desc cnl_chip_info = {
        .check_sdw_irq  = hda_common_check_sdw_irq,
        .check_ipc_irq  = hda_dsp_check_ipc_irq,
        .cl_init = cl_dsp_init,
+       .power_down_dsp = hda_power_down_dsp,
        .hw_ip_version = SOF_INTEL_CAVS_1_8,
 };
 EXPORT_SYMBOL_NS(cnl_chip_info, SND_SOC_SOF_INTEL_HDA_COMMON);
@@ -442,6 +443,7 @@ const struct sof_intel_dsp_desc jsl_chip_info = {
        .check_sdw_irq  = hda_common_check_sdw_irq,
        .check_ipc_irq  = hda_dsp_check_ipc_irq,
        .cl_init = cl_dsp_init,
+       .power_down_dsp = hda_power_down_dsp,
        .hw_ip_version = SOF_INTEL_CAVS_2_0,
 };
 EXPORT_SYMBOL_NS(jsl_chip_info, SND_SOC_SOF_INTEL_HDA_COMMON);
index f7068a7..c7fe13d 100644 (file)
@@ -1219,6 +1219,14 @@ int hda_dsp_remove(struct snd_sof_dev *sdev)
        return 0;
 }
 
+int hda_power_down_dsp(struct snd_sof_dev *sdev)
+{
+       struct sof_intel_hda_dev *hda = sdev->pdata->hw_pdata;
+       const struct sof_intel_dsp_desc *chip = hda->desc;
+
+       return hda_dsp_core_reset_power_down(sdev, chip->host_managed_cores_mask);
+}
+
 #if IS_ENABLED(CONFIG_SND_SOC_SOF_HDA)
 static void hda_generic_machine_select(struct snd_sof_dev *sdev,
                                       struct snd_soc_acpi_mach **mach)
index 2013a94..65b6faf 100644 (file)
@@ -567,6 +567,7 @@ int hda_dsp_core_run(struct snd_sof_dev *sdev, unsigned int core_mask);
 int hda_dsp_enable_core(struct snd_sof_dev *sdev, unsigned int core_mask);
 int hda_dsp_core_reset_power_down(struct snd_sof_dev *sdev,
                                  unsigned int core_mask);
+int hda_power_down_dsp(struct snd_sof_dev *sdev);
 int hda_dsp_core_get(struct snd_sof_dev *sdev, int core);
 void hda_dsp_ipc_int_enable(struct snd_sof_dev *sdev);
 void hda_dsp_ipc_int_disable(struct snd_sof_dev *sdev);
index 59ce313..ea10ae7 100644 (file)
@@ -175,6 +175,7 @@ const struct sof_intel_dsp_desc icl_chip_info = {
        .check_sdw_irq  = hda_common_check_sdw_irq,
        .check_ipc_irq  = hda_dsp_check_ipc_irq,
        .cl_init = cl_dsp_init,
+       .power_down_dsp = hda_power_down_dsp,
        .hw_ip_version = SOF_INTEL_CAVS_2_0,
 };
 EXPORT_SYMBOL_NS(icl_chip_info, SND_SOC_SOF_INTEL_HDA_COMMON);
index f05905e..fdf1814 100644 (file)
@@ -111,6 +111,7 @@ const struct sof_intel_dsp_desc skl_chip_info = {
        .rom_status_reg = HDA_DSP_SRAM_REG_ROM_STATUS_SKL,
        .rom_init_timeout       = 300,
        .check_ipc_irq  = hda_dsp_check_ipc_irq,
+       .power_down_dsp = hda_power_down_dsp,
        .hw_ip_version = SOF_INTEL_CAVS_1_5,
 };
 EXPORT_SYMBOL_NS(skl_chip_info, SND_SOC_SOF_INTEL_HDA_COMMON);
index 5135e1c..3d675e7 100644 (file)
@@ -130,6 +130,7 @@ const struct sof_intel_dsp_desc tgl_chip_info = {
        .check_sdw_irq  = hda_common_check_sdw_irq,
        .check_ipc_irq  = hda_dsp_check_ipc_irq,
        .cl_init = cl_dsp_init,
+       .power_down_dsp = hda_power_down_dsp,
        .hw_ip_version = SOF_INTEL_CAVS_2_5,
 };
 EXPORT_SYMBOL_NS(tgl_chip_info, SND_SOC_SOF_INTEL_HDA_COMMON);
@@ -153,6 +154,7 @@ const struct sof_intel_dsp_desc tglh_chip_info = {
        .check_sdw_irq  = hda_common_check_sdw_irq,
        .check_ipc_irq  = hda_dsp_check_ipc_irq,
        .cl_init = cl_dsp_init,
+       .power_down_dsp = hda_power_down_dsp,
        .hw_ip_version = SOF_INTEL_CAVS_2_5,
 };
 EXPORT_SYMBOL_NS(tglh_chip_info, SND_SOC_SOF_INTEL_HDA_COMMON);
@@ -176,6 +178,7 @@ const struct sof_intel_dsp_desc ehl_chip_info = {
        .check_sdw_irq  = hda_common_check_sdw_irq,
        .check_ipc_irq  = hda_dsp_check_ipc_irq,
        .cl_init = cl_dsp_init,
+       .power_down_dsp = hda_power_down_dsp,
        .hw_ip_version = SOF_INTEL_CAVS_2_5,
 };
 EXPORT_SYMBOL_NS(ehl_chip_info, SND_SOC_SOF_INTEL_HDA_COMMON);
@@ -199,6 +202,7 @@ const struct sof_intel_dsp_desc adls_chip_info = {
        .check_sdw_irq  = hda_common_check_sdw_irq,
        .check_ipc_irq  = hda_dsp_check_ipc_irq,
        .cl_init = cl_dsp_init,
+       .power_down_dsp = hda_power_down_dsp,
        .hw_ip_version = SOF_INTEL_CAVS_2_5,
 };
 EXPORT_SYMBOL_NS(adls_chip_info, SND_SOC_SOF_INTEL_HDA_COMMON);