MIPS: BMIPS: Add support GPIO device nodes
authorJaedon Shin <jaedon.shin@gmail.com>
Fri, 19 Aug 2016 02:52:27 +0000 (11:52 +0900)
committerRalf Baechle <ralf@linux-mips.org>
Thu, 6 Oct 2016 15:31:02 +0000 (17:31 +0200)
Adds GPIO device nodes to BCM7xxx MIPS based SoCs.

Signed-off-by: Jaedon Shin <jaedon.shin@gmail.com>
Cc: Florian Fainelli <f.fainelli@gmail.com>
Cc: Jonas Gorski <jonas.gorski@gmail.com>
Cc: Kevin Cernekee <cernekee@gmail.com>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: MIPS Mailing List <linux-mips@linux-mips.org>
Cc: devicetree@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/14001/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
arch/mips/boot/dts/brcm/bcm7125.dtsi
arch/mips/boot/dts/brcm/bcm7346.dtsi
arch/mips/boot/dts/brcm/bcm7358.dtsi
arch/mips/boot/dts/brcm/bcm7360.dtsi
arch/mips/boot/dts/brcm/bcm7362.dtsi
arch/mips/boot/dts/brcm/bcm7420.dtsi
arch/mips/boot/dts/brcm/bcm7425.dtsi
arch/mips/boot/dts/brcm/bcm7435.dtsi

index 97191f6..746ed06 100644 (file)
                        status = "disabled";
                };
 
+               upg_gio: gpio@406700 {
+                       compatible = "brcm,brcmstb-gpio";
+                       reg = <0x406700 0x80>;
+                       #gpio-cells = <2>;
+                       #interrupt-cells = <2>;
+                       gpio-controller;
+                       interrupt-controller;
+                       interrupt-parent = <&upg_irq0_intc>;
+                       interrupts = <6>;
+                       brcm,gpio-bank-widths = <32 32 32 18>;
+               };
+
                ehci0: usb@488300 {
                        compatible = "brcm,bcm7125-ehci", "generic-ehci";
                        reg = <0x488300 0x100>;
index eb7b19a..0105e4e 100644 (file)
                        status = "disabled";
                };
 
+               aon_pm_l2_intc: interrupt-controller@408440 {
+                       compatible = "brcm,l2-intc";
+                       reg = <0x408440 0x30>;
+                       interrupt-controller;
+                       #interrupt-cells = <1>;
+                       interrupt-parent = <&periph_intc>;
+                       interrupts = <53>;
+                       brcm,irq-can-wake;
+               };
+
+               upg_gio: gpio@406700 {
+                       compatible = "brcm,brcmstb-gpio";
+                       reg = <0x406700 0x60>;
+                       #gpio-cells = <2>;
+                       #interrupt-cells = <2>;
+                       gpio-controller;
+                       interrupt-controller;
+                       interrupt-parent = <&upg_irq0_intc>;
+                       interrupts = <6>;
+                       brcm,gpio-bank-widths = <32 32 16>;
+               };
+
+               upg_gio_aon: gpio@408c00 {
+                       compatible = "brcm,brcmstb-gpio";
+                       reg = <0x408c00 0x60>;
+                       #gpio-cells = <2>;
+                       #interrupt-cells = <2>;
+                       gpio-controller;
+                       interrupt-controller;
+                       interrupt-parent = <&upg_aon_irq0_intc>;
+                       interrupts = <6>;
+                       interrupts-extended = <&upg_aon_irq0_intc 6>,
+                                             <&aon_pm_l2_intc 5>;
+                       wakeup-source;
+                       brcm,gpio-bank-widths = <27 32 2>;
+               };
+
                enet0: ethernet@430000 {
                        phy-mode = "internal";
                        phy-handle = <&phy1>;
index b2276b1..aec1b2e 100644 (file)
                        status = "disabled";
                };
 
+               aon_pm_l2_intc: interrupt-controller@408240 {
+                       compatible = "brcm,l2-intc";
+                       reg = <0x408240 0x30>;
+                       interrupt-controller;
+                       #interrupt-cells = <1>;
+                       interrupt-parent = <&periph_intc>;
+                       interrupts = <50>;
+                       brcm,irq-can-wake;
+               };
+
+               upg_gio: gpio@406500 {
+                       compatible = "brcm,brcmstb-gpio";
+                       reg = <0x406500 0xa0>;
+                       #gpio-cells = <2>;
+                       #interrupt-cells = <2>;
+                       gpio-controller;
+                       interrupt-controller;
+                       interrupt-parent = <&upg_irq0_intc>;
+                       interrupts = <6>;
+                       brcm,gpio-bank-widths = <32 32 32 29 4>;
+               };
+
+               upg_gio_aon: gpio@408c00 {
+                       compatible = "brcm,brcmstb-gpio";
+                       reg = <0x408c00 0x60>;
+                       #gpio-cells = <2>;
+                       #interrupt-cells = <2>;
+                       gpio-controller;
+                       interrupt-controller;
+                       interrupt-parent = <&upg_aon_irq0_intc>;
+                       interrupts = <6>;
+                       interrupts-extended = <&upg_aon_irq0_intc 6>,
+                                             <&aon_pm_l2_intc 5>;
+                       wakeup-source;
+                       brcm,gpio-bank-widths = <21 32 2>;
+               };
+
                enet0: ethernet@430000 {
                        phy-mode = "internal";
                        phy-handle = <&phy1>;
index e414af1..f0f63cb 100644 (file)
                        status = "disabled";
                };
 
+               aon_pm_l2_intc: interrupt-controller@408440 {
+                       compatible = "brcm,l2-intc";
+                       reg = <0x408440 0x30>;
+                       interrupt-controller;
+                       #interrupt-cells = <1>;
+                       interrupt-parent = <&periph_intc>;
+                       interrupts = <50>;
+                       brcm,irq-can-wake;
+               };
+
+               upg_gio: gpio@406500 {
+                       compatible = "brcm,brcmstb-gpio";
+                       reg = <0x406500 0xa0>;
+                       #gpio-cells = <2>;
+                       #interrupt-cells = <2>;
+                       gpio-controller;
+                       interrupt-controller;
+                       interrupt-parent = <&upg_irq0_intc>;
+                       interrupts = <6>;
+                       brcm,gpio-bank-widths = <32 32 32 29 4>;
+               };
+
+               upg_gio_aon: gpio@408c00 {
+                       compatible = "brcm,brcmstb-gpio";
+                       reg = <0x408c00 0x60>;
+                       #gpio-cells = <2>;
+                       #interrupt-cells = <2>;
+                       gpio-controller;
+                       interrupt-controller;
+                       interrupt-parent = <&upg_aon_irq0_intc>;
+                       interrupts = <6>;
+                       interrupts-extended = <&upg_aon_irq0_intc 6>,
+                                             <&aon_pm_l2_intc 5>;
+                       wakeup-source;
+                       brcm,gpio-bank-widths = <21 32 2>;
+               };
+
                enet0: ethernet@430000 {
                        phy-mode = "internal";
                        phy-handle = <&phy1>;
index 3bd1c01..ac42b98 100644 (file)
                        status = "disabled";
                };
 
+               aon_pm_l2_intc: interrupt-controller@408440 {
+                       compatible = "brcm,l2-intc";
+                       reg = <0x408440 0x30>;
+                       interrupt-controller;
+                       #interrupt-cells = <1>;
+                       interrupt-parent = <&periph_intc>;
+                       interrupts = <50>;
+                       brcm,irq-can-wake;
+               };
+
+               upg_gio: gpio@406500 {
+                       compatible = "brcm,brcmstb-gpio";
+                       reg = <0x406500 0xa0>;
+                       #gpio-cells = <2>;
+                       #interrupt-cells = <2>;
+                       gpio-controller;
+                       interrupt-controller;
+                       interrupt-parent = <&upg_irq0_intc>;
+                       interrupts = <6>;
+                       brcm,gpio-bank-widths = <32 32 32 29 4>;
+               };
+
+               upg_gio_aon: gpio@408c00 {
+                       compatible = "brcm,brcmstb-gpio";
+                       reg = <0x408c00 0x60>;
+                       #gpio-cells = <2>;
+                       #interrupt-cells = <2>;
+                       gpio-controller;
+                       interrupt-controller;
+                       interrupt-parent = <&upg_aon_irq0_intc>;
+                       interrupts = <6>;
+                       interrupts-extended = <&upg_aon_irq0_intc 6>,
+                                             <&aon_pm_l2_intc 5>;
+                       wakeup-source;
+                       brcm,gpio-bank-widths = <21 32 2>;
+               };
+
                enet0: ethernet@430000 {
                        phy-mode = "internal";
                        phy-handle = <&phy1>;
index 27c3d45..0d391d7 100644 (file)
                        status = "disabled";
                };
 
+               upg_gio: gpio@406700 {
+                       compatible = "brcm,brcmstb-gpio";
+                       reg = <0x406700 0x80>;
+                       #gpio-cells = <2>;
+                       #interrupt-cells = <2>;
+                       gpio-controller;
+                       interrupt-controller;
+                       interrupt-parent = <&upg_irq0_intc>;
+                       interrupts = <6>;
+                       brcm,gpio-bank-widths = <32 32 32 27>;
+               };
+
                enet0: ethernet@468000 {
                        phy-mode = "internal";
                        phy-handle = <&phy1>;
index 9ab65d6..8b05b98 100644 (file)
                        status = "disabled";
                };
 
+               aon_pm_l2_intc: interrupt-controller@408440 {
+                       compatible = "brcm,l2-intc";
+                       reg = <0x408440 0x30>;
+                       interrupt-controller;
+                       #interrupt-cells = <1>;
+                       interrupt-parent = <&periph_intc>;
+                       interrupts = <49>;
+                       brcm,irq-can-wake;
+               };
+
+               upg_gio: gpio@406700 {
+                       compatible = "brcm,brcmstb-gpio";
+                       reg = <0x406700 0x80>;
+                       #gpio-cells = <2>;
+                       #interrupt-cells = <2>;
+                       gpio-controller;
+                       interrupt-controller;
+                       interrupt-parent = <&upg_irq0_intc>;
+                       interrupts = <6>;
+                       brcm,gpio-bank-widths = <32 32 32 21>;
+               };
+
+               upg_gio_aon: gpio@4094c0 {
+                       compatible = "brcm,brcmstb-gpio";
+                       reg = <0x4094c0 0x40>;
+                       #gpio-cells = <2>;
+                       #interrupt-cells = <2>;
+                       gpio-controller;
+                       interrupt-controller;
+                       interrupt-parent = <&upg_aon_irq0_intc>;
+                       interrupts = <6>;
+                       interrupts-extended = <&upg_aon_irq0_intc 6>,
+                                             <&aon_pm_l2_intc 5>;
+                       wakeup-source;
+                       brcm,gpio-bank-widths = <18 4>;
+               };
+
                enet0: ethernet@b80000 {
                        phy-mode = "internal";
                        phy-handle = <&phy1>;
index 7801169..b7bb102 100644 (file)
                        status = "disabled";
                };
 
+               aon_pm_l2_intc: interrupt-controller@408440 {
+                       compatible = "brcm,l2-intc";
+                       reg = <0x408440 0x30>;
+                       interrupt-controller;
+                       #interrupt-cells = <1>;
+                       interrupt-parent = <&periph_intc>;
+                       interrupts = <54>;
+                       brcm,irq-can-wake;
+               };
+
+               upg_gio: gpio@406700 {
+                       compatible = "brcm,brcmstb-gpio";
+                       reg = <0x406700 0x80>;
+                       #gpio-cells = <2>;
+                       #interrupt-cells = <2>;
+                       gpio-controller;
+                       interrupt-controller;
+                       interrupt-parent = <&upg_irq0_intc>;
+                       interrupts = <6>;
+                       brcm,gpio-bank-widths = <32 32 32 21>;
+               };
+
+               upg_gio_aon: gpio@4094c0 {
+                       compatible = "brcm,brcmstb-gpio";
+                       reg = <0x4094c0 0x40>;
+                       #gpio-cells = <2>;
+                       #interrupt-cells = <2>;
+                       gpio-controller;
+                       interrupt-controller;
+                       interrupt-parent = <&upg_aon_irq0_intc>;
+                       interrupts = <6>;
+                       interrupts-extended = <&upg_aon_irq0_intc 6>,
+                                             <&aon_pm_l2_intc 5>;
+                       wakeup-source;
+                       brcm,gpio-bank-widths = <18 4>;
+               };
+
                enet0: ethernet@b80000 {
                        phy-mode = "internal";
                        phy-handle = <&phy1>;