Merge tag 'pci-v6.2-changes' of git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci

Pull PCI updates from Bjorn Helgaas:
 "Enumeration:

   - Squash portdrv_{core,pci}.c into portdrv.c to ease maintenance and
     make more things static.

   - Make portdrv bind to Switch Ports that have AER. Previously, if
     these Ports lacked MSI/MSI-X, portdrv failed to bind, which meant
     the Ports couldn't be suspended to low-power states. AER on these
     Ports doesn't use interrupts, and the AER driver doesn't need to
     claim them.

   - Assign PCI domain IDs using ida_alloc(), which makes host bridge
     add/remove work better.

  Resource management:

   - To work better with recent BIOSes that use EfiMemoryMappedIO for
     PCI host bridge apertures, remove those regions from the E820 map
     (E820 entries normally prevent us from allocating BARs). In v5.19,
     we added some quirks to disable E820 checking, but that's not very
     maintainable. EfiMemoryMappedIO means the OS needs to map the
     region for use by EFI runtime services; it shouldn't prevent OS
     from using it.

  PCIe native device hotplug:

   - Build pciehp by default if USB4 is enabled, since Thunderbolt/USB4
     PCIe tunneling depends on native PCIe hotplug.

   - Enable Command Completed Interrupt only if supported to avoid user
     confusion from lspci output that says this is enabled but not
     supported.

   - Prevent pciehp from binding to Switch Upstream Ports; this happened
     because of interaction with acpiphp and caused devices below the
     Upstream Port to disappear.

  Power management:

   - Convert AGP drivers to generic power management. We hope to remove
     legacy power management from the PCI core eventually.

  Virtualization:

   - Fix pci_device_is_present(), which previously always returned
     "false" for VFs, causing virtio hangs when unbinding the driver.

  Miscellaneous:

   - Convert drivers to gpiod API to prepare for dropping some legacy
     code.

   - Fix DOE fencepost error for the maximum data object length.

  Baikal-T1 PCIe controller driver:

   - Add driver and DT bindings.

  Broadcom STB PCIe controller driver:

   - Enable Multi-MSI.

   - Delay 100ms after PERST# deassert to allow power and clocks to
     stabilize.

   - Configure Read Completion Boundary to 64 bytes.

  Freescale i.MX6 PCIe controller driver:

   - Initialize PHY before deasserting core reset to fix a regression in
     v6.0 on boards where the PHY provides the reference.

   - Fix imx6sx and imx8mq clock names in DT schema.

  Intel VMD host bridge driver:

   - Fix Secondary Bus Reset on VMD bridges, which allows reset of NVMe
     SSDs in VT-d pass-through scenarios.

   - Disable MSI remapping, which gets re-enabled by firmware during
     suspend/resume.

  MediaTek PCIe Gen3 controller driver:

   - Add MT7986 and MT8195 support.

  Qualcomm PCIe controller driver:

   - Add SC8280XP/SA8540P basic interconnect support.

  Rockchip DesignWare PCIe controller driver:

   - Base DT schema on common Synopsys schema.

  Synopsys DesignWare PCIe core:

   - Collect DT items shared between Root Port and Endpoint (PERST GPIO,
     PHY info, clocks, resets, link speed, number of lanes, number of
     iATU windows, interrupt info, etc) to snps,dw-pcie-common.yaml.

   - Add dma-ranges support for Root Ports and Endpoints.

   - Consolidate DT resource retrieval for "dbi", "dbi2", "atu", etc. to
     reduce code duplication.

   - Add generic names for clocks and resets to encourage more
     consistent naming across drivers using DesignWare IP.

   - Stop advertising PTM Responder role for Endpoints, which aren't
     allowed to be responders.

  TI J721E PCIe driver:

   - Add j721s2 host mode ID to DT schema.

   - Add interrupt properties to DT schema.

  Toshiba Visconti PCIe controller driver:

   - Fix interrupts array max constraints in DT schema"

* tag 'pci-v6.2-changes' of git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci: (95 commits)
  x86/PCI: Use pr_info() when possible
  x86/PCI: Fix log message typo
  x86/PCI: Tidy E820 removal messages
  PCI: Skip allocate_resource() if too little space available
  efi/x86: Remove EfiMemoryMappedIO from E820 map
  PCI/portdrv: Allow AER service only for Root Ports & RCECs
  PCI: xilinx-nwl: Fix coding style violations
  PCI: mvebu: Switch to using gpiod API
  PCI: pciehp: Enable Command Completed Interrupt only if supported
  PCI: aardvark: Switch to using devm_gpiod_get_optional()
  dt-bindings: PCI: mediatek-gen3: add support for mt7986
  dt-bindings: PCI: mediatek-gen3: add SoC based clock config
  dt-bindings: PCI: qcom: Allow 'dma-coherent' property
  PCI: mt7621: Add sentinel to quirks table
  PCI: vmd: Fix secondary bus reset for Intel bridges
  PCI: endpoint: pci-epf-vntb: Fix sparse ntb->reg build warning
  PCI: endpoint: pci-epf-vntb: Fix sparse build warning for epf_db
  PCI: endpoint: pci-epf-vntb: Replace hardcoded 4 with sizeof(u32)
  PCI: endpoint: pci-epf-vntb: Remove unused epf_db_phy struct member
  PCI: endpoint: pci-epf-vntb: Fix call pci_epc_mem_free_addr() in error path
  ...

diff --cc Documentation/devicetree/bindings/pci/snps,dw-pcie.yaml
index 7e0b015,c62c8fe..1a83f0f
--- 1/Documentation/devicetree/bindings/pci/snps,dw-pcie.yaml
--- 2/Documentation/devicetree/bindings/pci/snps,dw-pcie.yaml
+++ b/Documentation/devicetree/bindings/pci/snps,dw-pcie.yaml
@@@ -34,46 -39,161 +39,163 @@@ properties
      minItems: 2
      maxItems: 5
      items:
-       enum: [ dbi, dbi2, config, atu, atu_dma, app, appl, elbi, mgmt, ctrl,
-               parf, cfg, link, ulreg, smu, mpu, apb, phy, ecam ]
- 
-   num-lanes:
-     description: |
-       number of lanes to use (this property should be specified unless
-       the link is brought already up in firmware)
-     maximum: 16
- 
-   reset-gpio:
-     description: GPIO pin number of PERST# signal
-     maxItems: 1
-     deprecated: true
- 
-   reset-gpios:
-     description: GPIO controlled connection to PERST# signal
-     maxItems: 1
- 
-   interrupts: true
- 
-   interrupt-names: true
- 
-   clocks: true
- 
-   snps,enable-cdm-check:
-     type: boolean
-     description: |
-       This is a boolean property and if present enables
-       automatic checking of CDM (Configuration Dependent Module) registers
-       for data corruption. CDM registers include standard PCIe configuration
-       space registers, Port Logic registers, DMA and iATU (internal Address
-       Translation Unit) registers.
- 
-   num-viewport:
-     $ref: /schemas/types.yaml#/definitions/uint32
-     maximum: 256
-     description: |
-       number of view ports configured in hardware. If a platform
-       does not specify it, the driver autodetects it.
-     deprecated: true
+       oneOf:
+         - description:
+             Basic DWC PCIe controller configuration-space accessible over
+             the DBI interface. This memory space is either activated with
+             CDM/ELBI = 0 and CS2 = 0 or is a contiguous memory region
+             with all spaces. Note iATU/eDMA CSRs are indirectly accessible
+             via the PL viewports on the DWC PCIe controllers older than
+             v4.80a.
+           const: dbi
+         - description:
+             Shadow DWC PCIe config-space registers. This space is selected
+             by setting CDM/ELBI = 0 and CS2 = 1. This is an intermix of
+             the PCI-SIG PCIe CFG-space with the shadow registers for some
+             PCI Header space, PCI Standard and Extended Structures. It's
+             mainly relevant for the end-point controller configuration,
+             but still there are some shadow registers available for the
+             Root Port mode too.
+           const: dbi2
+         - description:
+             External Local Bus registers. It's an application-dependent
+             registers normally defined by the platform engineers. The space
+             can be selected by setting CDM/ELBI = 1 and CS2 = 0 wires or can
+             be accessed over some platform-specific means (for instance
+             as a part of a system controller).
+           enum: [ elbi, app ]
+         - description:
+             iATU/eDMA registers common for all device functions. It's an
+             unrolled memory space with the internal Address Translation
+             Unit and Enhanced DMA, which is selected by setting CDM/ELBI = 1
+             and CS2 = 1. For IP-core releases prior v4.80a, these registers
+             have been programmed via an indirect addressing scheme using a
+             set of viewport CSRs mapped into the PL space. Note iATU is
+             normally mapped to the 0x0 address of this region, while eDMA
+             is available at 0x80000 base address.
+           const: atu
+         - description:
+             Platform-specific eDMA registers. Some platforms may have eDMA
+             CSRs mapped in a non-standard base address. The registers offset
+             can be changed or the MS/LS-bits of the address can be attached
+             in an additional RTL block before the MEM-IO transactions reach
+             the DW PCIe slave interface.
+           const: dma
+         - description:
+             PHY/PCS configuration registers. Some platforms can have the
+             PCS and PHY CSRs accessible over a dedicated memory mapped
+             region, but mainly these registers are indirectly accessible
+             either by means of the embedded PHY viewport schema or by some
+             platform-specific method.
+           const: phy
+         - description:
+             Outbound iATU-capable memory-region which will be used to access
+             the peripheral PCIe devices configuration space.
+           const: config
+         - description:
+             Vendor-specific CSR names. Consider using the generic names above
+             for new bindings.
+           oneOf:
+             - description: See native 'elbi/app' CSR region for details.
+               enum: [ apb, mgmt, link, ulreg, appl ]
+             - description: See native 'atu' CSR region for details.
+               enum: [ atu_dma ]
+             - description: Syscon-related CSR regions.
+               enum: [ smu, mpu ]
++            - description: Tegra234 aperture
++              enum: [ ecam ]
+     allOf:
+       - contains:
+           const: dbi
+       - contains:
+           const: config
+ 
+   interrupts:
+     description:
+       DWC PCIe Root Port/Complex specific IRQ signals. At least MSI interrupt
+       signal is supposed to be specified for the host controller.
+     minItems: 1
+     maxItems: 26
+ 
+   interrupt-names:
+     minItems: 1
+     maxItems: 26
+     items:
+       oneOf:
+         - description:
+             Controller request to read or write virtual product data
+             from/to the VPD capability registers.
+           const: vpd
+         - description:
+             Link Equalization Request flag is set in the Link Status 2
+             register (applicable if the corresponding IRQ is enabled in
+             the Link Control 3 register).
+           const: l_eq
+         - description:
+             Indicates that the eDMA Tx/Rx transfer is complete or that an
+             error has occurred on the corresponding channel. eDMA can have
+             eight Tx (Write) and Rx (Read) eDMA channels thus supporting up
+             to 16 IRQ signals all together. Write eDMA channels shall go
+             first in the ordered row as per default edma_int[*] bus setup.
+           pattern: '^dma([0-9]|1[0-5])?$'
+         - description:
+             PCIe protocol correctable error or a Data Path protection
+             correctable error is detected by the automotive/safety
+             feature.
+           const: sft_ce
+         - description:
+             Indicates that the internal safety mechanism has detected an
+             uncorrectable error.
+           const: sft_ue
+         - description:
+             Application-specific IRQ raised depending on the vendor-specific
+             events basis.
+           const: app
+         - description:
+             DSP AXI MSI Interrupt detected. It gets de-asserted when there is
+             no more MSI interrupt pending. The interrupt is relevant to the
+             iMSI-RX - Integrated MSI Receiver (AXI bridge).
+           const: msi
+         - description:
+             Legacy A/B/C/D interrupt signal. Basically it's triggered by
+             receiving a Assert_INT{A,B,C,D}/Desassert_INT{A,B,C,D} message
+             from the downstream device.
+           pattern: "^int(a|b|c|d)$"
+         - description:
+             Error condition detected and a flag is set in the Root Error Status
+             register of the AER capability. It's asserted when the RC
+             internally generated an error or an error message is received by
+             the RC.
+           const: aer
+         - description:
+             PME message is received by the port. That means having the PME
+             status bit set in the Root Status register (the event is
+             supposed to be unmasked in the Root Control register).
+           const: pme
+         - description:
+             Hot-plug event is detected. That is a bit has been set in the
+             Slot Status register and the corresponding event is enabled in
+             the Slot Control register.
+           const: hp
+         - description:
+             Link Autonomous Bandwidth Status flag has been set in the Link
+             Status register (the event is supposed to be unmasked in the
+             Link Control register).
+           const: bw_au
+         - description:
+             Bandwidth Management Status flag has been set in the Link
+             Status register (the event is supposed to be unmasked in the
+             Link Control register).
+           const: bw_mg
+         - description:
+             Vendor-specific IRQ names. Consider using the generic names above
+             for new bindings.
+           oneOf:
+             - description: See native "app" IRQ for details
+               enum: [ intr ]
+     allOf:
+       - contains:
+           const: msi
  
  additionalProperties: true
  

diff --cc arch/x86/platform/efi/efi.c
Simple merge

diff --cc drivers/pci/controller/dwc/Kconfig
Simple merge

diff --cc drivers/pci/controller/pci-tegra.c
Simple merge

diff --cc drivers/pci/pci-sysfs.c
Simple merge

diff --cc drivers/pci/probe.c
Simple merge

diff --cc include/linux/pci.h
Simple merge

diff --cc include/uapi/linux/pci_regs.h
Simple merge