Convert CONFIG_SYS_FSL_MAX_NUM_OF_SEC to Kconfig

This converts the following to Kconfig:
   CONFIG_SYS_FSL_MAX_NUM_OF_SEC

Signed-off-by: Tom Rini <trini@konsulko.com>

diff --git a/arch/arm/include/asm/arch-fsl-layerscape/config.h b/arch/arm/include/asm/arch-fsl-layerscape/config.h
index 587d585..1b108dd 100644 (file)
--- a/arch/arm/include/asm/arch-fsl-layerscape/config.h
+++ b/arch/arm/include/asm/arch-fsl-layerscape/config.h
@@ -94,8 +94,6 @@
 #define EPU_EPCTR5             0x700060a14ULL
 #define EPU_EPGCR              0x700060000ULL
 
-#define CONFIG_SYS_FSL_MAX_NUM_OF_SEC          1
-
 #elif defined(CONFIG_ARCH_LS1088A)
 #define CONFIG_SYS_FSL_NUM_CC_PLLS             3
 #define CONFIG_SYS_FSL_CLUSTER_CLOCKS          { 1, 1 }
@@ -129,7 +127,6 @@
 #define CONFIG_MAX_MEM_MAPPED          CONFIG_SYS_DDR_BLOCK1_SIZE
 
 /* DCFG - GUR */
-#define CONFIG_SYS_FSL_MAX_NUM_OF_SEC  1
 #define CONFIG_SYS_FSL_OCRAM_BASE      0x18000000 /* initial RAM */
 #define SYS_FSL_OCRAM_SPACE_SIZE       0x00200000 /* 2M space */
 #define CONFIG_SYS_FSL_OCRAM_SIZE      0x00020000 /* Real size 128K */
@@ -165,8 +162,6 @@
 
 /* DCFG - GUR */
 
-#define CONFIG_SYS_FSL_MAX_NUM_OF_SEC          1
-
 #elif defined(CONFIG_ARCH_LS1028A)
 #define CONFIG_SYS_FSL_NUM_CC_PLLS             3
 #define CONFIG_SYS_FSL_CLUSTER_CLOCKS          { 1, 1 }
@@ -204,7 +199,6 @@
 #define CONFIG_MAX_MEM_MAPPED          CONFIG_SYS_DDR_BLOCK1_SIZE
 
 /* SEC */
-#define CONFIG_SYS_FSL_MAX_NUM_OF_SEC          1
 
 /* DCFG - GUR */
 
@@ -258,12 +252,9 @@
 #define GIC_ADDR_BIT           31
 #define SCFG_GIC400_ALIGN      0x1570188
 
-#define CONFIG_SYS_FSL_MAX_NUM_OF_SEC          1
-
 #elif defined(CONFIG_ARCH_LS1012A)
 #define GICD_BASE              0x01401000
 #define GICC_BASE              0x01402000
-#define CONFIG_SYS_FSL_MAX_NUM_OF_SEC           1
 #define CONFIG_SYS_DDR_BLOCK1_SIZE     ((phys_size_t)2 << 30)
 #define CONFIG_MAX_MEM_MAPPED          CONFIG_SYS_DDR_BLOCK1_SIZE
 
@@ -281,8 +272,6 @@
 /* Generic Interrupt Controller Definitions */
 #define GICD_BASE              0x01410000
 #define GICC_BASE              0x01420000
-
-#define CONFIG_SYS_FSL_MAX_NUM_OF_SEC          1
 #else
 #error SoC not defined
 #endif

diff --git a/arch/arm/include/asm/arch-imx8/imx-regs.h b/arch/arm/include/asm/arch-imx8/imx-regs.h
index 2d64b06..3d32b7a 100644 (file)
--- a/arch/arm/include/asm/arch-imx8/imx-regs.h
+++ b/arch/arm/include/asm/arch-imx8/imx-regs.h
@@ -48,6 +48,5 @@
 #define USB_PHY0_BASE_ADDR     0x5b100000
 
 #define CONFIG_SYS_FSL_SEC_ADDR (0x31400000)
-#define CONFIG_SYS_FSL_MAX_NUM_OF_SEC  1
 
 #endif /* __ASM_ARCH_IMX8_REGS_H__ */

diff --git a/arch/arm/include/asm/arch-imx8m/imx-regs.h b/arch/arm/include/asm/arch-imx8m/imx-regs.h
index 6969cde..ff3b9dd 100644 (file)
--- a/arch/arm/include/asm/arch-imx8m/imx-regs.h
+++ b/arch/arm/include/asm/arch-imx8m/imx-regs.h
@@ -92,7 +92,6 @@
 #define CONFIG_SYS_FSL_JR0_OFFSET       (0x1000)
 #define CONFIG_SYS_FSL_JR0_ADDR         (CONFIG_SYS_FSL_SEC_ADDR + \
                                         CONFIG_SYS_FSL_JR0_OFFSET)
-#define CONFIG_SYS_FSL_MAX_NUM_OF_SEC   1
 #if !defined(__ASSEMBLY__)
 #include <asm/types.h>
 #include <linux/bitops.h>

diff --git a/arch/arm/include/asm/arch-ls102xa/config.h b/arch/arm/include/asm/arch-ls102xa/config.h
index 1b2be8f..0e32828 100644 (file)
--- a/arch/arm/include/asm/arch-ls102xa/config.h
+++ b/arch/arm/include/asm/arch-ls102xa/config.h
@@ -82,7 +82,6 @@
 #define DCU_LAYER_MAX_NUM                      16
 
 #ifdef CONFIG_ARCH_LS1021A
-#define CONFIG_SYS_FSL_MAX_NUM_OF_SEC          1
 #else
 #error SoC not defined
 #endif

diff --git a/arch/arm/include/asm/arch-mx6/imx-regs.h b/arch/arm/include/asm/arch-mx6/imx-regs.h
index a8a5bf7..56b3a58 100644 (file)
--- a/arch/arm/include/asm/arch-mx6/imx-regs.h
+++ b/arch/arm/include/asm/arch-mx6/imx-regs.h
@@ -244,7 +244,6 @@
 #define CONFIG_SYS_FSL_JR0_OFFSET   0x1000
 #define CONFIG_SYS_FSL_JR0_ADDR     (CAAM_BASE_ADDR + \
                                     CONFIG_SYS_FSL_JR0_OFFSET)
-#define CONFIG_SYS_FSL_MAX_NUM_OF_SEC  1
 
 #define USB_PL301_BASE_ADDR         (AIPS2_OFF_BASE_ADDR + 0x0000)
 #define USB_BASE_ADDR               (AIPS2_OFF_BASE_ADDR + 0x4000)

diff --git a/arch/arm/include/asm/arch-mx7/imx-regs.h b/arch/arm/include/asm/arch-mx7/imx-regs.h
index 5cab12f..1e9d11b 100644 (file)
--- a/arch/arm/include/asm/arch-mx7/imx-regs.h
+++ b/arch/arm/include/asm/arch-mx7/imx-regs.h
@@ -221,7 +221,6 @@
 #define CONFIG_SYS_FSL_JR0_OFFSET       0x1000
 #define CONFIG_SYS_FSL_JR0_ADDR         (CONFIG_SYS_FSL_SEC_ADDR + \
                                         CONFIG_SYS_FSL_JR0_OFFSET)
-#define CONFIG_SYS_FSL_MAX_NUM_OF_SEC   1
 #if !(defined(__KERNEL_STRICT_NAMES) || defined(__ASSEMBLY__))
 #include <asm/mach-imx/regs-lcdif.h>
 #include <asm/types.h>

diff --git a/arch/arm/include/asm/arch-mx7ulp/imx-regs.h b/arch/arm/include/asm/arch-mx7ulp/imx-regs.h
index cb0c2c1..ffa170f 100644 (file)
--- a/arch/arm/include/asm/arch-mx7ulp/imx-regs.h
+++ b/arch/arm/include/asm/arch-mx7ulp/imx-regs.h
@@ -234,7 +234,6 @@
 #define CONFIG_SYS_FSL_JR0_OFFSET       0x1000
 #define CONFIG_SYS_FSL_JR0_ADDR         (CONFIG_SYS_FSL_SEC_ADDR + \
                                         CONFIG_SYS_FSL_JR0_OFFSET)
-#define CONFIG_SYS_FSL_MAX_NUM_OF_SEC   1
 
 #define IOMUXC_DPCR_DDR_DQS0   ((IOMUXC_DDR_RBASE + (4 * 32)))
 #define IOMUXC_DPCR_DDR_DQS1   ((IOMUXC_DDR_RBASE + (4 * 33)))

diff --git a/arch/powerpc/include/asm/config_mpc85xx.h b/arch/powerpc/include/asm/config_mpc85xx.h
index 543b0c5..b5b59a0 100644 (file)
--- a/arch/powerpc/include/asm/config_mpc85xx.h
+++ b/arch/powerpc/include/asm/config_mpc85xx.h
@@ -286,13 +286,8 @@
 #define CONFIG_FSL_SDHC_V2_3
 #define CONFIG_TSECV2_1
 #define CONFIG_SYS_FSL_IFC_BANK_COUNT  8
-#define CONFIG_SYS_FSL_MAX_NUM_OF_SEC  3
 #define CONFIG_SYS_FSL_SEC_IDX_OFFSET  0x20000
 
 #endif
 
-#if !defined(CONFIG_ARCH_C29X)
-#define CONFIG_SYS_FSL_MAX_NUM_OF_SEC  1
-#endif
-
 #endif /* _ASM_MPC85xx_CONFIG_H_ */

diff --git a/drivers/crypto/fsl/Kconfig b/drivers/crypto/fsl/Kconfig
index e03fcdd..b04c701 100644 (file)
--- a/drivers/crypto/fsl/Kconfig
+++ b/drivers/crypto/fsl/Kconfig
@@ -10,6 +10,11 @@ config FSL_CAAM
          Module (CAAM), also known as the SEC version 4 (SEC4). The driver uses
          Job Ring as interface to communicate with CAAM.
 
+config SYS_FSL_MAX_NUM_OF_SEC
+       int "Number of job rings in the CAAM"
+       depends on FSL_CAAM
+       default 1
+
 config CAAM_64BIT
        bool
        default y if PHYS_64BIT && !ARCH_IMX8M && !ARCH_IMX8