radeon/vcn: use st_rps_bits only when it's set

Fixes: c9baccb5

For certain player which doesn't implement st_rps_bits, or when st_rps_bits
is set to 0 (e.g. it doesn't have rps explicitly defined in slice header),
we don't set st_rps_bits and the related flag, since we don't skip parsing
the rps structure in these cases.

Signed-off-by: Boyuan Zhang <boyuan.zhang@amd.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11432>

diff --git a/src/gallium/drivers/radeon/radeon_vcn_dec.c b/src/gallium/drivers/radeon/radeon_vcn_dec.c
index 2fd61bf..454b798 100644 (file)
--- a/src/gallium/drivers/radeon/radeon_vcn_dec.c
+++ b/src/gallium/drivers/radeon/radeon_vcn_dec.c
@@ -198,8 +198,10 @@ static rvcn_dec_message_hevc_t get_h265_msg(struct radeon_decoder *dec,
       result.sps_info_flags |= 1 << 9;
    if (pic->UseRefPicList == true)
       result.sps_info_flags |= 1 << 10;
-   if (pic->UseStRpsBits == true)
+   if (pic->UseStRpsBits == true && pic->pps->st_rps_bits != 0) {
       result.sps_info_flags |= 1 << 11;
+      result.st_rps_bits = pic->pps->st_rps_bits;
+  }
 
    result.chroma_format = pic->pps->sps->chroma_format_idc;
    result.bit_depth_luma_minus8 = pic->pps->sps->bit_depth_luma_minus8;
@@ -259,7 +261,6 @@ static rvcn_dec_message_hevc_t get_h265_msg(struct radeon_decoder *dec,
    result.num_tile_rows_minus1 = pic->pps->num_tile_rows_minus1;
    result.log2_parallel_merge_level_minus2 = pic->pps->log2_parallel_merge_level_minus2;
    result.init_qp_minus26 = pic->pps->init_qp_minus26;
-   result.st_rps_bits = pic->pps->st_rps_bits;
 
    for (i = 0; i < 19; ++i)
       result.column_width_minus1[i] = pic->pps->column_width_minus1[i];