arm64: dts: fsd: fix drive strength macros as per FSD HW UM
authorPadmanabhan Rajanbabu <p.rajanbabu@samsung.com>
Thu, 13 Oct 2022 10:40:21 +0000 (16:10 +0530)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Sat, 31 Dec 2022 12:31:48 +0000 (13:31 +0100)
[ Upstream commit 574d6c59daefb51729b0640465f007f6c9600358 ]

Drive strength macros defined for FSD platform is not reflecting actual
names and values as per HW UM. FSD SoC pinctrl has following four levels
of drive-strength and their corresponding values:
Level-1 <-> 0
Level-2 <-> 1
Level-4 <-> 2
Level-6 <-> 3

The commit 684dac402f21 ("arm64: dts: fsd: Add initial pinctrl support")
used drive strength macros defined for Exynos4 SoC family. For some IPs
the macros values of Exynos4 matched and worked well, but Exynos4 SoC
family drive-strength (names and values) is not exactly matching with
FSD SoC.

Fix the drive strength macros to reflect actual names and values given
in FSD HW UM.

Fixes: 684dac402f21 ("arm64: dts: fsd: Add initial pinctrl support")
Signed-off-by: Padmanabhan Rajanbabu <p.rajanbabu@samsung.com>
Reviewed-by: Alim Akhtar <alim.akhtar@samsung.com>
Link: https://lore.kernel.org/r/20221013104024.50179-2-p.rajanbabu@samsung.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Sasha Levin <sashal@kernel.org>
arch/arm64/boot/dts/tesla/fsd-pinctrl.dtsi
arch/arm64/boot/dts/tesla/fsd-pinctrl.h

index d0abb9a..4e151d4 100644 (file)
                samsung,pins = "gpf5-0";
                samsung,pin-function = <FSD_PIN_FUNC_2>;
                samsung,pin-pud = <FSD_PIN_PULL_NONE>;
-               samsung,pin-drv = <FSD_PIN_DRV_LV2>;
+               samsung,pin-drv = <FSD_PIN_DRV_LV4>;
        };
 
        ufs_refclk_out: ufs-refclk-out-pins {
                samsung,pins = "gpf5-1";
                samsung,pin-function = <FSD_PIN_FUNC_2>;
                samsung,pin-pud = <FSD_PIN_PULL_NONE>;
-               samsung,pin-drv = <FSD_PIN_DRV_LV2>;
+               samsung,pin-drv = <FSD_PIN_DRV_LV4>;
        };
 };
 
                samsung,pins = "gpb6-1";
                samsung,pin-function = <FSD_PIN_FUNC_2>;
                samsung,pin-pud = <FSD_PIN_PULL_UP>;
-               samsung,pin-drv = <FSD_PIN_DRV_LV2>;
+               samsung,pin-drv = <FSD_PIN_DRV_LV4>;
        };
 
        pwm1_out: pwm1-out-pins {
                samsung,pins = "gpb6-5";
                samsung,pin-function = <FSD_PIN_FUNC_2>;
                samsung,pin-pud = <FSD_PIN_PULL_UP>;
-               samsung,pin-drv = <FSD_PIN_DRV_LV2>;
+               samsung,pin-drv = <FSD_PIN_DRV_LV4>;
        };
 
        hs_i2c0_bus: hs-i2c0-bus-pins {
index 6ffbda3..c397d02 100644 (file)
@@ -16,9 +16,9 @@
 #define FSD_PIN_PULL_UP                        3
 
 #define FSD_PIN_DRV_LV1                        0
-#define FSD_PIN_DRV_LV2                        2
-#define FSD_PIN_DRV_LV3                        1
-#define FSD_PIN_DRV_LV4                        3
+#define FSD_PIN_DRV_LV2                        1
+#define FSD_PIN_DRV_LV4                        2
+#define FSD_PIN_DRV_LV6                        3
 
 #define FSD_PIN_FUNC_INPUT             0
 #define FSD_PIN_FUNC_OUTPUT            1