Add ARM targets.

diff --git a/TargetList.txt b/TargetList.txt
index c91401f..1c98508 100644 (file)
--- a/TargetList.txt
+++ b/TargetList.txt
@@ -63,6 +63,11 @@ SPARC
 SPARCV7
 
 6.ARM CPU:
+CORTEXA15
+CORTEXA9
 ARMV7
 ARMV6
 ARMV5
+
+7.ARM 64-bit CPU:
+ARMV8

diff --git a/getarch.c b/getarch.c
index ed304b6..ee5f55f 100644 (file)
--- a/getarch.c
+++ b/getarch.c
@@ -752,8 +752,8 @@ USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
        "-DL2_SIZE=1048576 -DL2_LINESIZE=32 " \
        "-DDTB_DEFAULT_ENTRIES=128 -DDTB_SIZE=4096 -DL2_ASSOCIATIVE=4 " \
        "-DHAVE_VFPV3 -DHAVE_VFP -DHAVE_NEON"
-#define LIBNAME   "cortexa9"
-#define CORENAME  "CORTEXA9"
+#define LIBNAME   "cortexa15"
+#define CORENAME  "CORTEXA15"
 #else
 #endif