drm/amd/display: Use pitch when calculating size to cache in MALL
authorAlvin Lee <Alvin.Lee2@amd.com>
Sat, 6 Aug 2022 16:00:26 +0000 (12:00 -0400)
committerAlex Deucher <alexander.deucher@amd.com>
Tue, 16 Aug 2022 22:09:09 +0000 (18:09 -0400)
[Description]
Use pitch when calculating size to cache in MALL

Reviewed-by: Samson Tam <Samson.Tam@amd.com>
Acked-by: Brian Chang <Brian.Chang@amd.com>
Signed-off-by: Alvin Lee <Alvin.Lee2@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/display/dc/dcn32/dcn32_resource_helpers.c

index b3f8503..955f52e 100644 (file)
@@ -63,7 +63,7 @@ uint32_t dcn32_helper_calculate_num_ways_for_subvp(struct dc *dc, struct dc_stat
                if (pipe->stream && pipe->plane_state && !pipe->top_pipe &&
                                pipe->stream->mall_stream_config.type == SUBVP_PHANTOM) {
                        bytes_per_pixel = pipe->plane_state->format >= SURFACE_PIXEL_FORMAT_GRPH_ARGB16161616 ? 8 : 4;
-                       mall_region_pixels = pipe->stream->timing.h_addressable * pipe->stream->timing.v_addressable;
+                       mall_region_pixels = pipe->plane_state->plane_size.surface_pitch * pipe->stream->timing.v_addressable;
 
                        // For bytes required in MALL, calculate based on number of MBlks required
                        num_mblks = (mall_region_pixels * bytes_per_pixel +