* gas/config/tc-arm.c (do_t_mov_cmp): Allow MOV lowreg, lowreg when no CPU

	is specified.
	* gas/testsuite/gas/arm/mov-highregs-any.d: New testcase.
	* gas/testsuite/gas/arm/mov-highregs-any.s: Likewise.
	* gas/testsuite/gas/arm/mov-lowregs-any.d: Likewise.
	* gas/testsuite/gas/arm/mov-lowregs-any.s: Likewise.

diff --git a/gas/ChangeLog b/gas/ChangeLog
index 003d4f0..d8cf381 100644 (file)
--- a/gas/ChangeLog
+++ b/gas/ChangeLog
@@ -1,3 +1,8 @@
+2011-11-25  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
+
+       * config/tc-arm.c (do_t_mov_cmp): Allow MOV lowreg, lowreg when no CPU
+       is specified.
+
 2011-11-23  Tristan Gingold  <gingold@adacore.com>
 
        * config/tc-alpha.c (s_alpha_prologue): Requires empty line.

diff --git a/gas/config/tc-arm.c b/gas/config/tc-arm.c
index bf44228..6e23be0 100644 (file)
--- a/gas/config/tc-arm.c
+++ b/gas/config/tc-arm.c
@@ -10914,10 +10914,16 @@ do_t_mov_cmp (void)
          {
          case T_MNEM_mov:
            /* In v4t or v5t a move of two lowregs produces unpredictable
-              results. Don't allow this.*/
-           constraint (low_regs && !ARM_CPU_HAS_FEATURE (selected_cpu,
-                       arm_ext_v6),"MOV Rd, Rs with two low registers is not "
-                       "permitted on this architecture");
+              results. Don't allow this.  */
+           if (low_regs)
+             {
+               constraint (!ARM_CPU_HAS_FEATURE (cpu_variant, arm_ext_v6),
+                           "MOV Rd, Rs with two low registers is not "
+                           "permitted on this architecture");
+               ARM_MERGE_FEATURE_SETS (thumb_arch_used, thumb_arch_used, 
+                                       arm_ext_v6);
+             }
+
            inst.instruction = T_OPCODE_MOV_HR;
            inst.instruction |= (Rn & 0x8) << 4;
            inst.instruction |= (Rn & 0x7);

diff --git a/gas/testsuite/ChangeLog b/gas/testsuite/ChangeLog
index 0d99df3..054eee3 100644 (file)
--- a/gas/testsuite/ChangeLog
+++ b/gas/testsuite/ChangeLog
@@ -1,3 +1,10 @@
+2011-11-25  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
+
+       * gas/arm/mov-highregs-any.d: New testcase.
+       * gas/arm/mov-highregs-any.s: Likewise.
+       * gas/arm/mov-lowregs-any.d: Likewise.
+       * gas/arm/mov-lowregs-any.s: Likewise.
+
 2011-11-21  Maciej W. Rozycki  <macro@codesourcery.com>
 
        * gas/mips/micromips@24k-branch-delay-1.d: New test.

diff --git a/gas/testsuite/gas/arm/mov-highregs-any.d b/gas/testsuite/gas/arm/mov-highregs-any.d
new file mode 100644 (file)
index 0000000..5f93ccd
--- /dev/null
+++ b/gas/testsuite/gas/arm/mov-highregs-any.d
@@ -0,0 +1,9 @@
+# name: MOV highregs
+# readelf: -A
+# target: *-*-*eabi
+Attribute Section: aeabi
+File Attributes
+  Tag_CPU_arch: v4T
+  Tag_THUMB_ISA_use: Thumb-1
+  Tag_DIV_use: Not allowed
+

diff --git a/gas/testsuite/gas/arm/mov-highregs-any.s b/gas/testsuite/gas/arm/mov-highregs-any.s
new file mode 100644 (file)
index 0000000..9e9e587
--- /dev/null
+++ b/gas/testsuite/gas/arm/mov-highregs-any.s
@@ -0,0 +1,3 @@
+       .syntax unified
+       .thumb
+       mov r8, r8

diff --git a/gas/testsuite/gas/arm/mov-lowregs-any.d b/gas/testsuite/gas/arm/mov-lowregs-any.d
new file mode 100644 (file)
index 0000000..1549df3
--- /dev/null
+++ b/gas/testsuite/gas/arm/mov-lowregs-any.d
@@ -0,0 +1,9 @@
+# name: MOV lowregs
+# readelf: -A
+# target: *-*-*eabi
+Attribute Section: aeabi
+File Attributes
+  Tag_CPU_arch: v6
+  Tag_THUMB_ISA_use: Thumb-1
+  Tag_DIV_use: Not allowed
+

diff --git a/gas/testsuite/gas/arm/mov-lowregs-any.s b/gas/testsuite/gas/arm/mov-lowregs-any.s
new file mode 100644 (file)
index 0000000..12619ef
--- /dev/null
+++ b/gas/testsuite/gas/arm/mov-lowregs-any.s
@@ -0,0 +1,3 @@
+       .syntax unified
+       .thumb
+       mov r0, r0