/**
* Validate event code of custom firmware event
*/
- int (*fw_event_validate_encoding)(uint64_t event_data);
+ int (*fw_event_validate_encoding)(uint32_t hartid, uint64_t event_data);
/**
* Match custom firmware counter with custom firmware event
* Note: 0 <= counter_index < SBI_PMU_FW_CTR_MAX
*/
- bool (*fw_counter_match_encoding)(uint32_t counter_index,
+ bool (*fw_counter_match_encoding)(uint32_t hartid,
+ uint32_t counter_index,
uint64_t event_data);
/**
* Read value of custom firmware counter
* Note: 0 <= counter_index < SBI_PMU_FW_CTR_MAX
*/
- uint64_t (*fw_counter_read_value)(uint32_t counter_index);
+ uint64_t (*fw_counter_read_value)(uint32_t hartid,
+ uint32_t counter_index);
/**
* Write value to custom firmware counter
* Note: 0 <= counter_index < SBI_PMU_FW_CTR_MAX
*/
- void (*fw_counter_write_value)(uint32_t counter_index,
+ void (*fw_counter_write_value)(uint32_t hartid, uint32_t counter_index,
uint64_t value);
/**
* Start custom firmware counter
* Note: 0 <= counter_index < SBI_PMU_FW_CTR_MAX
*/
- int (*fw_counter_start)(uint32_t counter_index,
+ int (*fw_counter_start)(uint32_t hartid, uint32_t counter_index,
uint64_t event_data);
/**
* Stop custom firmware counter
* Note: 0 <= counter_index < SBI_PMU_FW_CTR_MAX
*/
- int (*fw_counter_stop)(uint32_t counter_index);
+ int (*fw_counter_stop)(uint32_t hartid, uint32_t counter_index);
/**
* Custom enable irq for hardware counter
uint32_t event_idx_code = get_cidx_code(event_idx);
uint32_t event_idx_code_max = -1;
uint32_t cache_ops_result, cache_ops_id, cache_id;
+ u32 hartid = current_hartid();
switch(event_idx_type) {
case SBI_PMU_EVENT_TYPE_HW:
if (SBI_PMU_FW_PLATFORM == event_idx_code &&
pmu_dev && pmu_dev->fw_event_validate_encoding)
- return pmu_dev->fw_event_validate_encoding(edata);
+ return pmu_dev->fw_event_validate_encoding(hartid,
+ edata);
else
event_idx_code_max = SBI_PMU_FW_MAX;
break;
if (SBI_PMU_FW_PLATFORM == event_code) {
if (pmu_dev && pmu_dev->fw_counter_read_value)
- *cval = pmu_dev->fw_counter_read_value(cidx -
+ *cval = pmu_dev->fw_counter_read_value(hartid,
+ cidx -
num_hw_ctrs);
else
*cval = 0;
}
if (ival_update)
- pmu_dev->fw_counter_write_value(cidx - num_hw_ctrs,
+ pmu_dev->fw_counter_write_value(hartid,
+ cidx - num_hw_ctrs,
ival);
- return pmu_dev->fw_counter_start(cidx - num_hw_ctrs,
+ return pmu_dev->fw_counter_start(hartid, cidx - num_hw_ctrs,
event_data);
} else {
if (ival_update)
static int pmu_ctr_stop_fw(uint32_t cidx, uint32_t event_code)
{
+ u32 hartid = current_hartid();
int ret;
if ((event_code >= SBI_PMU_FW_MAX &&
if (SBI_PMU_FW_PLATFORM == event_code &&
pmu_dev && pmu_dev->fw_counter_stop) {
- ret = pmu_dev->fw_counter_stop(cidx - num_hw_ctrs);
+ ret = pmu_dev->fw_counter_stop(hartid, cidx - num_hw_ctrs);
if (ret)
return ret;
}
continue;
if (SBI_PMU_FW_PLATFORM == event_code &&
pmu_dev && pmu_dev->fw_counter_match_encoding) {
- if (!pmu_dev->fw_counter_match_encoding(cidx - num_hw_ctrs,
- edata))
+ if (!pmu_dev->fw_counter_match_encoding(hartid,
+ cidx - num_hw_ctrs,
+ edata))
continue;
}
if (flags & SBI_PMU_CFG_FLAG_AUTO_START) {
if (SBI_PMU_FW_PLATFORM == event_code &&
pmu_dev && pmu_dev->fw_counter_start) {
- ret = pmu_dev->fw_counter_start(ctr_idx -
- num_hw_ctrs,
- event_data);
+ ret = pmu_dev->fw_counter_start(hartid,
+ ctr_idx - num_hw_ctrs, event_data);
if (ret)
return ret;
}