Summary: This is prelimineary to moving random functions to SnippetGenerator.
Reviewers: courbet
Subscribers: tschuett, llvm-commits
Differential Revision: https://reviews.llvm.org/D52718
llvm-svn: 343456
});
}
-void InstructionTemplate::randomizeUnsetVariables(
- const llvm::BitVector &ForbiddenRegs) {
- for (const Variable &Var : Instr.Variables) {
- llvm::MCOperand &AssignedValue = getValueFor(Var);
- if (!AssignedValue.isValid())
- randomize(Instr, Var, AssignedValue, ForbiddenRegs);
- }
-}
-
llvm::MCInst InstructionTemplate::build() const {
llvm::MCInst Result;
Result.setOpcode(Instr.Description->Opcode);
setRegisterOperandValue(randomElement(RandomConf.Uses), UseIB);
}
+void randomizeUnsetVariables(const llvm::BitVector &ForbiddenRegs,
+ InstructionTemplate &IT) {
+ for (const Variable &Var : IT.Instr.Variables) {
+ llvm::MCOperand &AssignedValue = IT.getValueFor(Var);
+ if (!AssignedValue.isValid())
+ randomize(IT.Instr, Var, AssignedValue, ForbiddenRegs);
+ }
+}
+
} // namespace exegesis
const llvm::MCOperand &getValueFor(const Operand &Op) const;
bool hasImmediateVariables() const;
- // Assigns a Random Value to all Variables that are still Invalid.
- // Do not use any of the registers in `ForbiddenRegs`.
- void randomizeUnsetVariables(const llvm::BitVector &ForbiddenRegs);
-
// Builds an llvm::MCInst from this InstructionTemplate setting its operands
// to the corresponding variable values. Precondition: All VariableValues must
// be set.
void setRandomAliasing(const AliasingConfigurations &AliasingConfigurations,
InstructionTemplate &DefIB, InstructionTemplate &UseIB);
+// Assigns a Random Value to all Variables in IT that are still Invalid.
+// Do not use any of the registers in `ForbiddenRegs`.
+void randomizeUnsetVariables(const llvm::BitVector &ForbiddenRegs,
+ InstructionTemplate &IT);
+
} // namespace exegesis
#endif // LLVM_TOOLS_LLVM_EXEGESIS_CODETEMPLATE_H
SnippetGenerator::generateConfigurations(unsigned Opcode) const {
if (auto E = generateCodeTemplate(Opcode)) {
CodeTemplate &CT = E.get();
+ const llvm::BitVector &ForbiddenRegs =
+ CT.ScratchSpacePointerInReg
+ ? RATC.getRegister(CT.ScratchSpacePointerInReg).aliasedBits()
+ : RATC.emptyRegisters();
std::vector<BenchmarkCode> Output;
// TODO: Generate as many BenchmarkCode as needed.
{
BenchmarkCode BC;
BC.Info = CT.Info;
for (InstructionTemplate &IT : CT.Instructions) {
- IT.randomizeUnsetVariables(
- CT.ScratchSpacePointerInReg
- ? RATC.getRegister(CT.ScratchSpacePointerInReg).aliasedBits()
- : RATC.emptyRegisters());
+ randomizeUnsetVariables(ForbiddenRegs, IT);
BC.Instructions.push_back(IT.build());
}
if (CT.ScratchSpacePointerInReg)