CI: x86: coreboot: Update to latest coreboot

Use a recent coreboot build for this test.

The coreboot commit is:

   6f5ead14b4 mb/google/nissa/var/joxer: Update eMMC DLL settings

This is build with default settings, i.e. QEMU x86 i440fx/piix4

Add some documentation as to how to update it next time.

Signed-off-by: Simon Glass <sjg@chromium.org>

diff --git a/.azure-pipelines.yml b/.azure-pipelines.yml
index 31850ae..53a83ee 100644 (file)
--- a/.azure-pipelines.yml
+++ b/.azure-pipelines.yml
@@ -426,7 +426,7 @@ stages:
               cp images/spi-nor.img ${UBOOT_TRAVIS_BUILD_DIR}/;
           fi
           if [[ "${TEST_PY_BD}" == "coreboot" ]]; then
-              wget -O - "https://drive.google.com/uc?id=1x6nrtWIyIRPLS2cQBwYTnT2TbOI8UjmM&export=download" |xz -dc >${UBOOT_TRAVIS_BUILD_DIR}/coreboot.rom;
+              wget -O - "https://drive.google.com/uc?id=1uJ2VkUQ8czWFZmhJQ90Tp8V_zrJ6BrBH&export=download" |xz -dc >${UBOOT_TRAVIS_BUILD_DIR}/coreboot.rom;
               wget -O - "https://drive.google.com/uc?id=149Cz-5SZXHNKpi9xg6R_5XITWohu348y&export=download" >cbfstool;
               chmod a+x cbfstool;
               ./cbfstool ${UBOOT_TRAVIS_BUILD_DIR}/coreboot.rom add-flat-binary -f ${UBOOT_TRAVIS_BUILD_DIR}/u-boot.bin -n fallback/payload -c LZMA -l 0x1110000 -e 0x1110000;

diff --git a/.gitlab-ci.yml b/.gitlab-ci.yml
index 8010afa..1df1326 100644 (file)
--- a/.gitlab-ci.yml
+++ b/.gitlab-ci.yml
@@ -69,7 +69,7 @@ stages:
       fi
     - if [[ "${TEST_PY_BD}" == "coreboot" ]]; then
         wget -O -
-          "https://drive.google.com/uc?id=1x6nrtWIyIRPLS2cQBwYTnT2TbOI8UjmM&export=download" |
+          "https://drive.google.com/uc?id=1uJ2VkUQ8czWFZmhJQ90Tp8V_zrJ6BrBH&export=download" |
           xz -dc >${UBOOT_TRAVIS_BUILD_DIR}/coreboot.rom;
         wget -O -
           "https://drive.google.com/uc?id=149Cz-5SZXHNKpi9xg6R_5XITWohu348y&export=download" >

diff --git a/doc/board/coreboot/coreboot.rst b/doc/board/coreboot/coreboot.rst
index 21801a8..d660a22 100644 (file)
--- a/doc/board/coreboot/coreboot.rst
+++ b/doc/board/coreboot/coreboot.rst
@@ -134,3 +134,23 @@ input clock is 1843200. So you can add the following CONFIG options::
    CONFIG_DEBUG_UART_CLOCK=1843200
    CONFIG_DEBUG_UART_SHIFT=2
    CONFIG_DEBUG_UART_ANNOUNCE=y
+
+coreboot in CI
+--------------
+
+CI runs tests using a pre-built coreboot image. This ensures that U-Boot can
+boot as a coreboot payload, based on a known-good build of coreboot.
+
+To update the `coreboot.rom` file which is used:
+
+#. Build coreboot with `CONFIG_LINEAR_FRAMEBUFFER=y`. If using `make menuconfig`
+   this is under
+   `Devices ->Display->Framebuffer mode->Linear "high resolution" framebuffer`.
+
+#. Compress the resulting `coreboot.rom`::
+
+      xz -c /path/to/coreboot/build/coreboot.rom >coreboot.rom.xz
+
+#. Upload the file to Google drive
+
+#. Send a patch to change the file ID used by wget in the CI yaml files.