include/configs: drop COUNTER_FREQUENCY
authorPeng Fan <peng.fan@nxp.com>
Wed, 13 Apr 2022 09:47:21 +0000 (17:47 +0800)
committerTom Rini <trini@konsulko.com>
Thu, 21 Apr 2022 19:27:17 +0000 (15:27 -0400)
Since we have CONFIG_COUNTER_FREQUENCY enabled, no need COUNTER_FREQUENCY

Signed-off-by: Peng Fan <peng.fan@nxp.com>
69 files changed:
arch/arm/cpu/armv8/fsl-layerscape/spintable.S
include/configs/apalis-imx8.h
include/configs/apalis-imx8x.h
include/configs/capricorn-common.h
include/configs/cgtqmx8.h
include/configs/colibri-imx8x.h
include/configs/condor.h
include/configs/draak.h
include/configs/dragonboard410c.h
include/configs/dragonboard820c.h
include/configs/eagle.h
include/configs/ebisu.h
include/configs/exynos-common.h
include/configs/exynos7420-common.h
include/configs/exynos78x0-common.h
include/configs/falcon.h
include/configs/hihope-rzg2.h
include/configs/hikey.h
include/configs/hikey960.h
include/configs/imx8qm_mek.h
include/configs/imx8qm_rom7720.h
include/configs/imx8qxp_mek.h
include/configs/imx8ulp_evk.h
include/configs/km/pg-wcom-ls102xa.h
include/configs/kontron_sl28.h
include/configs/ls1012a_common.h
include/configs/ls1021aiot.h
include/configs/ls1021aqds.h
include/configs/ls1021atsn.h
include/configs/ls1021atwr.h
include/configs/ls1028a_common.h
include/configs/ls1043a_common.h
include/configs/ls1046a_common.h
include/configs/ls1088aqds.h
include/configs/ls1088ardb.h
include/configs/ls2080a_common.h
include/configs/lx2160a_common.h
include/configs/mt8183.h
include/configs/mt8512.h
include/configs/mt8516.h
include/configs/mt8518.h
include/configs/mx6_common.h
include/configs/mx7_common.h
include/configs/owl-common.h
include/configs/p2371-2180.h
include/configs/p2771-0000.h
include/configs/p3450-0000.h
include/configs/presidio_asic.h
include/configs/px30_common.h
include/configs/rk3036_common.h
include/configs/rk3128_common.h
include/configs/rk322x_common.h
include/configs/rk3288_common.h
include/configs/rk3308_common.h
include/configs/rk3328_common.h
include/configs/rk3368_common.h
include/configs/rk3399_common.h
include/configs/rk3568_common.h
include/configs/salvator-x.h
include/configs/sdm845.h
include/configs/silinux-ek874.h
include/configs/socfpga_soc64_common.h
include/configs/sunxi-common.h
include/configs/ten64.h
include/configs/thunderx_88xx.h
include/configs/ulcb.h
include/configs/vexpress_aemv8.h
include/configs/xilinx_versal.h
include/configs/xilinx_zynqmp.h

index d6bd188..1eb0c2d 100644 (file)
@@ -113,6 +113,6 @@ _dead_loop:
        .align 3
        .global __real_cntfrq
 __real_cntfrq:
-       .quad COUNTER_FREQUENCY
+       .quad CONFIG_COUNTER_FREQUENCY
        /* Secondary Boot Code ends here */
 __secondary_boot_code_end:
index c87bcd4..e759f18 100644 (file)
@@ -84,7 +84,4 @@
 #define CONFIG_SYS_PBSIZE              (CONFIG_SYS_CBSIZE + \
                                        sizeof(CONFIG_SYS_PROMPT) + 16)
 
-/* Generic Timer Definitions */
-#define COUNTER_FREQUENCY              8000000 /* 8MHz */
-
 #endif /* __APALIS_IMX8_H */
index 71a80f3..17f1981 100644 (file)
 #define CONFIG_SYS_PBSIZE              (CONFIG_SYS_CBSIZE + \
                                        sizeof(CONFIG_SYS_PROMPT) + 16)
 
-/* Generic Timer Definitions */
-#define COUNTER_FREQUENCY              8000000 /* 8MHz */
-
 /* Networking */
 #define CONFIG_FEC_ENET_DEV 0
 #define IMX_FEC_BASE                   0x5b040000
index 58d7a3a..1466be1 100644 (file)
 #define CONFIG_SYS_MAXARGS             64
 #define CONFIG_SYS_BARGSIZE            CONFIG_SYS_CBSIZE
 
-/* Generic Timer Definitions */
-#define COUNTER_FREQUENCY              8000000 /* 8MHz */
-
 #define BOOTAUX_RESERVED_MEM_BASE      0x88000000
 #define BOOTAUX_RESERVED_MEM_SIZE      SZ_128M /* Reserve from second 128MB */
 
index bd5c072..b5817f1 100644 (file)
 #define PHYS_SDRAM_1_SIZE              0x80000000      /* 2 GB */
 #define PHYS_SDRAM_2_SIZE              0x100000000     /* 4 GB */
 
-/* Generic Timer Definitions */
-#define COUNTER_FREQUENCY              8000000 /* 8MHz */
-
 /* Networking */
 #define CONFIG_FEC_MXC_PHYADDR         -1
 #define FEC_QUIRK_ENET_MAC
index 008fa6e..265b729 100644 (file)
                                        sizeof(CONFIG_SYS_PROMPT) + 16)
 
 /* Generic Timer Definitions */
-#define COUNTER_FREQUENCY              8000000 /* 8MHz */
 
 #define BOOTAUX_RESERVED_MEM_BASE 0x88000000
 #define BOOTAUX_RESERVED_MEM_SIZE SZ_128M /* Reserve from second 128MB */
index 213e68f..8191849 100644 (file)
@@ -24,7 +24,4 @@
 /* Board Clock */
 /* XTAL_CLK : 33.33MHz */
 
-/* Generic Timer Definitions (use in assembler source) */
-#define COUNTER_FREQUENCY      0xFE502A        /* 16.66MHz from CPclk */
-
 #endif /* __CONDOR_H */
index 5bd8740..476b4c3 100644 (file)
@@ -11,9 +11,6 @@
 
 #include "rcar-gen3-common.h"
 
-/* Generic Timer Definitions (use in assembler source) */
-#define COUNTER_FREQUENCY      0xFE502A        /* 16.66MHz from CPclk */
-
 /* Environment in eMMC, at the end of 2nd "boot sector" */
 
 #define CONFIG_FLASH_SHOW_PROGRESS     45
index 43a179f..14ba52a 100644 (file)
@@ -23,9 +23,6 @@
 
 /* UART */
 
-/* Generic Timer Definitions */
-#define COUNTER_FREQUENCY              19000000
-
 /* Fixup - in init code we switch from device to host mode,
  * it has to be done after each HCD reset */
 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET
index 229e1a3..1e2b15b 100644 (file)
@@ -23,9 +23,6 @@
 #define CONFIG_SYS_INIT_SP_ADDR                (CONFIG_SYS_SDRAM_BASE + 0x7fff0)
 #define CONFIG_SYS_BOOTM_LEN           SZ_64M
 
-/* Generic Timer Definitions */
-#define COUNTER_FREQUENCY              19000000
-
 #ifndef CONFIG_SPL_BUILD
 #include <config_distro_bootcmd.h>
 #endif
index 42fe057..c751f75 100644 (file)
@@ -16,7 +16,4 @@
 /* Board Clock */
 /* XTAL_CLK : 33.33MHz */
 
-/* Generic Timer Definitions (use in assembler source) */
-#define COUNTER_FREQUENCY      0xFE502A        /* 16.66MHz from CPclk */
-
 #endif /* __EAGLE_H */
index ce31a46..3adc418 100644 (file)
@@ -13,9 +13,6 @@
 
 #include "rcar-gen3-common.h"
 
-/* Generic Timer Definitions (use in assembler source) */
-#define COUNTER_FREQUENCY      0xFE502A        /* 16.66MHz from CPclk */
-
 /* Environment in eMMC, at the end of 2nd "boot sector" */
 
 #define CONFIG_FLASH_SHOW_PROGRESS     45
index eb26069..dd1cbd7 100644 (file)
@@ -19,7 +19,6 @@
 /* Keep L2 Cache Disabled */
 
 /* input clock of PLL: 24MHz input clock */
-#define COUNTER_FREQUENCY              24000000
 
 /* select serial console configuration */
 
index fcb238f..5658da4 100644 (file)
@@ -24,9 +24,6 @@
 
 /* select serial console configuration */
 
-/* Timer input clock frequency */
-#define COUNTER_FREQUENCY              24000000
-
 /* IRAM Layout */
 #define CONFIG_IRAM_BASE               0x02100000
 #define CONFIG_IRAM_SIZE               0x58000
index 457057c..ec43e13 100644 (file)
@@ -25,9 +25,6 @@
 /* Boot Argument Buffer Size */
 #define CONFIG_SYS_BARGSIZE            CONFIG_SYS_CBSIZE
 
-/* Timer input clock frequency */
-#define COUNTER_FREQUENCY              26000000
-
 #define CPU_RELEASE_ADDR               secondary_boot_addr
 
 #define CONFIG_SYS_BAUDRATE_TABLE \
index 52dcf19..446261c 100644 (file)
@@ -24,7 +24,4 @@
 /* Board Clock */
 /* XTAL_CLK : 16.66MHz */
 
-/* Generic Timer Definitions (use in assembler source) */
-#define COUNTER_FREQUENCY      0xFE502A        /* 16.66MHz from CPclk */
-
 #endif /* __FALCON_H */
index e46eb07..5470298 100644 (file)
@@ -11,7 +11,4 @@
 
 #include "rcar-gen3-common.h"
 
-/* Generic Timer Definitions (use in assembler source) */
-#define COUNTER_FREQUENCY      0xFE502A        /* 16.66MHz from CPclk */
-
 #endif /* __HIHOPE_RZG2_H */
index 29a0d94..19d5b62 100644 (file)
@@ -32,9 +32,6 @@
 
 #define CONFIG_SYS_INIT_SP_ADDR         (CONFIG_SYS_SDRAM_BASE + 0x7fff0)
 
-/* Generic Timer Definitions */
-#define COUNTER_FREQUENCY              19000000
-
 /* Generic Interrupt Controller Definitions */
 #define GICD_BASE                      0xf6801000
 #define GICC_BASE                      0xf6802000
index f446ecb..c088f2f 100644 (file)
@@ -24,9 +24,6 @@
 
 #define CONFIG_SYS_INIT_SP_ADDR         (CONFIG_SYS_SDRAM_BASE + 0x7fff0)
 
-/* Generic Timer Definitions */
-#define COUNTER_FREQUENCY              19000000
-
 /* Generic Interrupt Controller Definitions */
 #define GICD_BASE                      0xe82b1000
 #define GICC_BASE                      0xe82b2000
index 0fe38e6..a9c52d2 100644 (file)
 #define PHYS_SDRAM_1_SIZE              0x80000000      /* 2 GB */
 #define PHYS_SDRAM_2_SIZE              0x100000000     /* 4 GB */
 
-/* Generic Timer Definitions */
-#define COUNTER_FREQUENCY              8000000 /* 8MHz */
-
 #endif /* __IMX8QM_MEK_H */
index 7532c6e..c7cace2 100644 (file)
 /* LPDDR4 board total DDR is 6GB, DDR4 board total DDR is 4 GB */
 #define PHYS_SDRAM_2_SIZE              0x80000000      /* 2 GB */
 
-/* Generic Timer Definitions */
-#define COUNTER_FREQUENCY              8000000 /* 8MHz */
-
 #include <linux/stringify.h>
 #endif /* __IMX8QM_ROM7720_H */
index beb35c9..9052a91 100644 (file)
 /* LPDDR4 board total DDR is 3GB */
 #define PHYS_SDRAM_2_SIZE              0x40000000      /* 1 GB */
 
-/* Generic Timer Definitions */
-#define COUNTER_FREQUENCY              8000000 /* 8MHz */
-
 #ifndef CONFIG_DM_PCA953X
 #define CONFIG_PCA953X
 #endif
index f078c37..f274b66 100644 (file)
@@ -27,8 +27,6 @@
 
 #endif
 
-#define COUNTER_FREQUENCY              1000000 /* 1MHz */
-
 /* ENET Config */
 #if defined(CONFIG_FEC_MXC)
 #define PHY_ANEG_TIMEOUT               20000
index 0494790..dca5589 100644 (file)
 
 #define CONFIG_LAYERSCAPE_NS_ACCESS
 #define CONFIG_SMP_PEN_ADDR            0x01ee0200
-#define COUNTER_FREQUENCY              8333333
 
 #define CONFIG_HWCONFIG
 #define HWCONFIG_BUFFER_SIZE           256
index c3ab049..c47b594 100644 (file)
@@ -32,7 +32,6 @@
 #define CPU_RELEASE_ADDR               secondary_boot_addr
 
 /* generic timer */
-#define COUNTER_FREQUENCY              25000000
 
 /* early heap for SPL DM */
 #define CONFIG_MALLOC_F_ADDR           CONFIG_SYS_FSL_OCRAM_BASE
index f92ff17..67da01f 100644 (file)
@@ -21,9 +21,6 @@
 #define CONFIG_SYS_SDRAM_BASE          CONFIG_SYS_DDR_SDRAM_BASE
 #define CONFIG_SYS_DDR_BLOCK2_BASE     0x880000000ULL
 
-/* Generic Timer Definitions */
-#define COUNTER_FREQUENCY              25000000        /* 25MHz */
-
 /* CSU */
 #define CONFIG_LAYERSCAPE_NS_ACCESS
 
index 9746081..82ae349 100644 (file)
 #define CONFIG_PEN_ADDR_BIG_ENDIAN
 #define CONFIG_LAYERSCAPE_NS_ACCESS
 #define CONFIG_SMP_PEN_ADDR            0x01ee0200
-#define COUNTER_FREQUENCY              12500000
 
 #define CONFIG_HWCONFIG
 #define HWCONFIG_BUFFER_SIZE           256
index 010f3a1..7b79e08 100644 (file)
 #define CONFIG_PEN_ADDR_BIG_ENDIAN
 #define CONFIG_LAYERSCAPE_NS_ACCESS
 #define CONFIG_SMP_PEN_ADDR            0x01ee0200
-#define COUNTER_FREQUENCY              12500000
 
 #define CONFIG_HWCONFIG
 #define HWCONFIG_BUFFER_SIZE           256
index bc2a265..546c4fc 100644 (file)
@@ -99,7 +99,6 @@
 #endif
 
 #define CONFIG_LAYERSCAPE_NS_ACCESS
-#define COUNTER_FREQUENCY              12500000
 
 #define CONFIG_HWCONFIG
 #define HWCONFIG_BUFFER_SIZE           256
index 6b1ab87..b4383d4 100644 (file)
 #define CONFIG_PEN_ADDR_BIG_ENDIAN
 #define CONFIG_LAYERSCAPE_NS_ACCESS
 #define CONFIG_SMP_PEN_ADDR            0x01ee0200
-#define COUNTER_FREQUENCY              12500000
 
 #define CONFIG_HWCONFIG
 #define HWCONFIG_BUFFER_SIZE           256
index 7bb6d41..a98d8dd 100644 (file)
@@ -25,9 +25,6 @@
  */
 #define CPU_RELEASE_ADDR               secondary_boot_addr
 
-/* Generic Timer Definitions */
-#define COUNTER_FREQUENCY              25000000        /* 25MHz */
-
 /* GPIO */
 
 /* I2C */
index 83b95c2..61c6d45 100644 (file)
@@ -44,9 +44,6 @@
 
 #define CPU_RELEASE_ADDR               secondary_boot_addr
 
-/* Generic Timer Definitions */
-#define COUNTER_FREQUENCY              25000000        /* 25MHz */
-
 /* Serial Port */
 #define CONFIG_SYS_NS16550_SERIAL
 #define CONFIG_SYS_NS16550_REG_SIZE    1
index 7552610..f9279e4 100644 (file)
@@ -44,9 +44,6 @@
 
 #define CPU_RELEASE_ADDR               secondary_boot_addr
 
-/* Generic Timer Definitions */
-#define COUNTER_FREQUENCY              25000000        /* 25MHz */
-
 /* Serial Port */
 #define CONFIG_SYS_NS16550_SERIAL
 #define CONFIG_SYS_NS16550_REG_SIZE    1
index 1ea6bef..e532c34 100644 (file)
@@ -13,7 +13,6 @@
 #endif
 
 #define COUNTER_FREQUENCY_REAL         (get_board_sys_clk()/4)
-#define COUNTER_FREQUENCY              25000000        /* 25MHz */
 
 #define CONFIG_MEM_INIT_VALUE           0xdeadbeef
 #define SPD_EEPROM_ADDRESS             0x51
index 1a9cda1..693a2f6 100644 (file)
@@ -14,7 +14,6 @@
 #endif
 
 #define COUNTER_FREQUENCY_REAL         25000000        /* 25MHz */
-#define COUNTER_FREQUENCY              25000000        /* 25MHz */
 
 #ifdef CONFIG_EMU
 #define CONFIG_SYS_FSL_DDR_EMU
index 82585f5..e77e9b7 100644 (file)
 
 #define CONFIG_SYS_FSL_OTHER_DDR_NUM_CTRLS
 
-/* Generic Timer Definitions */
 /*
  * This is not an accurate number. It is used in start.S. The frequency
  * will be udpated later when get_bus_freq(0) is available.
  */
-#define COUNTER_FREQUENCY              25000000        /* 25MHz */
 
 /* GPIO */
 
index 96dfe49..d569014 100644 (file)
@@ -46,7 +46,6 @@
  * will be udpated later when get_bus_freq(0) is available.
  */
 
-#define COUNTER_FREQUENCY              25000000        /* 25MHz */
 
 /* Serial Port */
 #define CONFIG_PL011_CLOCK             (get_bus_freq(0) / 4)
index 2b4e976..ee31c02 100644 (file)
@@ -11,7 +11,6 @@
 
 #include <linux/sizes.h>
 
-#define COUNTER_FREQUENCY              13000000
 
 #define CONFIG_SYS_NS16550_SERIAL
 #define CONFIG_SYS_NS16550_REG_SIZE    -4
index 9c443db..1af8d2e 100644 (file)
@@ -13,7 +13,6 @@
 
 #define CONFIG_SYS_NONCACHED_MEMORY            SZ_1M
 
-#define COUNTER_FREQUENCY                      13000000
 
 #define CONFIG_SYS_BOOTM_LEN                   SZ_64M
 
index 47132c1..cb2af58 100644 (file)
@@ -11,7 +11,6 @@
 
 #include <linux/sizes.h>
 
-#define COUNTER_FREQUENCY              13000000
 
 #define CONFIG_SYS_NS16550_SERIAL
 #define CONFIG_SYS_NS16550_REG_SIZE    -4
index 49ee926..8ca8d25 100644 (file)
@@ -13,7 +13,6 @@
 
 #define CONFIG_SYS_NONCACHED_MEMORY            SZ_1M
 
-#define COUNTER_FREQUENCY                      13000000
 
 /* DRAM definition */
 #define CONFIG_SYS_SDRAM_BASE                  0x40000000
index a0e4817..10e46c6 100644 (file)
@@ -10,7 +10,6 @@
 
 #if (defined(CONFIG_MX6UL) || defined(CONFIG_MX6ULL))
 #define CONFIG_SC_TIMER_CLK 8000000 /* 8Mhz */
-#define COUNTER_FREQUENCY CONFIG_SC_TIMER_CLK
 #else
 #ifndef CONFIG_SYS_L2CACHE_OFF
 #define CONFIG_SYS_L2_PL310
index 76c374a..9f7d60f 100644 (file)
@@ -16,7 +16,6 @@
 /* Timer settings */
 #define CONFIG_MXC_GPT_HCLK
 #define CONFIG_SC_TIMER_CLK 8000000 /* 8Mhz */
-#define COUNTER_FREQUENCY CONFIG_SC_TIMER_CLK
 
 #define CONFIG_SYS_BOOTM_LEN   0x1000000
 
index 9645321..fabbb01 100644 (file)
@@ -13,9 +13,6 @@
 /* SDRAM Definitions */
 #define CONFIG_SYS_SDRAM_BASE          0x0
 
-/* Generic Timer Definitions */
-#define COUNTER_FREQUENCY              (24000000)      /* 24MHz */
-
 /* Some commands use this as the default load address */
 
 /*
index ef1fa2a..7f94288 100644 (file)
@@ -24,7 +24,4 @@
 
 #include "tegra-common-post.h"
 
-/* Crystal is 38.4MHz. clk_m runs at half that rate */
-#define COUNTER_FREQUENCY      19200000
-
 #endif /* _P2371_2180_H */
index 4c3da22..84cdd57 100644 (file)
@@ -37,7 +37,4 @@
 
 #include "tegra-common-post.h"
 
-/* Crystal is 38.4MHz. clk_m runs at half that rate */
-#define COUNTER_FREQUENCY      19200000
-
 #endif
index 1c962be..ec1a863 100644 (file)
@@ -35,7 +35,4 @@
 /* General networking support */
 #include "tegra-common-post.h"
 
-/* Crystal is 38.4MHz. clk_m runs at half that rate */
-#define COUNTER_FREQUENCY      19200000
-
 #endif /* _P3450_0000_H */
index 3295d43..1d526a7 100644 (file)
@@ -12,8 +12,7 @@
 #define CONFIG_SYS_BOOTM_LEN           0x00c00000
 
 /* Generic Timer Definitions */
-#define COUNTER_FREQUENCY              25000000
-#define CONFIG_SYS_TIMER_RATE          COUNTER_FREQUENCY
+#define CONFIG_SYS_TIMER_RATE          25000000
 #define CONFIG_SYS_TIMER_COUNTER       0xf4321008
 
 /* note: arch/arm/cpu/armv8/start.S which references GICD_BASE/GICC_BASE
index dc60901..a7f5e91 100644 (file)
@@ -12,8 +12,6 @@
 
 #define CONFIG_SYS_NS16550_MEM32
 
-#define COUNTER_FREQUENCY              24000000
-
 /* FIXME: ff020000 is pmu_mem (10k), while ff0e0000 is regular int_mem */
 #define CONFIG_IRAM_BASE               0xff020000
 
index 5905518..ab2b492 100644 (file)
@@ -10,7 +10,6 @@
 
 #define CONFIG_SYS_CBSIZE              1024
 
-#define COUNTER_FREQUENCY              24000000
 #define CONFIG_SYS_HZ_CLOCK            24000000
 
 #define CONFIG_SYS_INIT_SP_ADDR                0x60100000
index d77a7d7..8f04e9d 100644 (file)
@@ -11,7 +11,6 @@
 #define CONFIG_SYS_MAXARGS             16
 #define CONFIG_SYS_CBSIZE              1024
 
-#define COUNTER_FREQUENCY              24000000
 #define CONFIG_SYS_HZ_CLOCK            24000000
 
 #define CONFIG_IRAM_BASE               0x10080000
index 3258820..36191ee 100644 (file)
@@ -11,7 +11,6 @@
 #define CONFIG_SYS_CBSIZE              1024
 #define CONFIG_SYS_BOOTM_LEN   (64 << 20)      /*  64M */
 
-#define COUNTER_FREQUENCY              24000000
 #define CONFIG_SYS_HZ_CLOCK            24000000
 
 #define CONFIG_SYS_INIT_SP_ADDR                0x61100000
index e2e0f70..075623f 100644 (file)
@@ -13,7 +13,6 @@
 
 #define CONFIG_SYS_CBSIZE              1024
 
-#define COUNTER_FREQUENCY              24000000
 #define CONFIG_SYS_HZ_CLOCK            24000000
 
 #ifdef CONFIG_SPL_ROCKCHIP_BACK_TO_BROM
index 9cda8d9..44a3e7a 100644 (file)
@@ -20,7 +20,6 @@
 #define CONFIG_SPL_STACK               0x00400000
 #define CONFIG_SYS_BOOTM_LEN           (64 << 20)      /* 64M */
 
-#define COUNTER_FREQUENCY              24000000
 
 #define CONFIG_SYS_BOOTM_LEN   (64 << 20)      /* 64M */
 
index 8a5f0c8..2b8d77c 100644 (file)
@@ -10,8 +10,6 @@
 
 #define CONFIG_IRAM_BASE               0xff090000
 
-#define COUNTER_FREQUENCY              24000000
-
 #define CONFIG_SYS_CBSIZE              1024
 
 #define CONFIG_SYS_INIT_SP_ADDR                0x00300000
index 239296c..2f71ce7 100644 (file)
@@ -15,8 +15,6 @@
 #define SDRAM_MAX_SIZE                 0xff000000
 #define CONFIG_SYS_CBSIZE              1024
 
-#define COUNTER_FREQUENCY              24000000
-
 #define CONFIG_IRAM_BASE               0xff8c0000
 
 #define CONFIG_SYS_INIT_SP_ADDR                0x00300000
index 4037dba..8e13737 100644 (file)
@@ -10,8 +10,6 @@
 
 #define CONFIG_SYS_CBSIZE              1024
 
-#define COUNTER_FREQUENCY               24000000
-
 #define CONFIG_IRAM_BASE               0xff8c0000
 
 #define CONFIG_SYS_INIT_SP_ADDR                0x00300000
index 5649cd6..e9947ea 100644 (file)
@@ -10,8 +10,6 @@
 
 #define CONFIG_SYS_CBSIZE              1024
 
-#define COUNTER_FREQUENCY               24000000
-
 #define CONFIG_IRAM_BASE               0xfdcc0000
 
 #define CONFIG_SYS_INIT_SP_ADDR                0x00c00000
index 764bc1b..eb00e2b 100644 (file)
@@ -11,9 +11,6 @@
 
 #include "rcar-gen3-common.h"
 
-/* Generic Timer Definitions (use in assembler source) */
-#define COUNTER_FREQUENCY      0xFE502A        /* 16.66MHz from CPclk */
-
 /* Environment in eMMC, at the end of 2nd "boot sector" */
 
 #define CONFIG_FLASH_SHOW_PROGRESS     45
index ba57323..835f05d 100644 (file)
@@ -13,9 +13,6 @@
 
 #define CONFIG_SYS_BAUDRATE_TABLE      { 115200, 230400, 460800, 921600 }
 
-/* Generic Timer Definitions */
-#define COUNTER_FREQUENCY      19000000
-
 #define CONFIG_EXTRA_ENV_SETTINGS \
        "bootm_size=0x4000000\0"        \
        "bootm_low=0x80000000\0"        \
index a99babb..346858c 100644 (file)
@@ -11,7 +11,4 @@
 
 #include "rcar-gen3-common.h"
 
-/* Generic Timer Definitions (use in assembler source) */
-#define COUNTER_FREQUENCY      0xFE502A        /* 16.66MHz from CPclk */
-
 #endif /* __SILINUX_EK874_H */
index c288d54..3447b8f 100644 (file)
 #define CONFIG_SYS_NS16550_MEM32
 
 /*
- * Timer & watchdog configurations
- */
-#define COUNTER_FREQUENCY              400000000
-
-/*
  * SDMMC configurations
  */
 #ifdef CONFIG_CMD_MMC
index a903103..068340a 100644 (file)
@@ -38,7 +38,6 @@
 #endif
 
 /* CPU */
-#define COUNTER_FREQUENCY              24000000
 
 /*
  * The DRAM Base differs between some models. We cannot use macros for the
index f82b1e0..04772c9 100644 (file)
@@ -9,7 +9,6 @@
 
 #include "ls1088a_common.h"
 
-#define COUNTER_FREQUENCY              25000000        /* 25MHz */
 
 #define CONFIG_SYS_LS_MC_BOOT_TIMEOUT_MS 5000
 
index d07a8fe..3537ba3 100644 (file)
@@ -20,9 +20,6 @@
 /* SMP Spin Table Definitions */
 #define CPU_RELEASE_ADDR               (CONFIG_SYS_SDRAM_BASE + 0x7fff0)
 
-/* Generic Timer Definitions */
-#define COUNTER_FREQUENCY              (0x1800000)     /* 24MHz */
-
 /* PL011 Serial Configuration */
 
 #define CONFIG_PL011_CLOCK             24000000
index c991bff..14ea40b 100644 (file)
@@ -11,9 +11,6 @@
 
 #include "rcar-gen3-common.h"
 
-/* Generic Timer Definitions (use in assembler source) */
-#define COUNTER_FREQUENCY      0xFE502A        /* 16.66MHz from CPclk */
-
 /* Environment in eMMC, at the end of 2nd "boot sector" */
 
 #define CONFIG_FLASH_SHOW_PROGRESS     45
index 4f0ff23..0632b36 100644 (file)
@@ -73,9 +73,6 @@
 #define V2M_SYS_CFGCTRL                        (V2M_SYSREGS + 0x0a4)
 #define V2M_SYS_CFGSTAT                        (V2M_SYSREGS + 0x0a8)
 
-/* Generic Timer Definitions */
-#define COUNTER_FREQUENCY              24000000        /* 24MHz */
-
 /* Generic Interrupt Controller Definitions */
 #ifdef CONFIG_GICV3
 #define GICD_BASE                      (V2M_PA_BASE + 0x2f000000)
index b025d26..b78c242 100644 (file)
 
 #define CONFIG_SYS_INIT_SP_ADDR                CONFIG_SYS_TEXT_BASE
 
-/* Generic Timer Definitions - setup in EL3. Setup by ATF for other cases */
-#if CONFIG_COUNTER_FREQUENCY
-# define COUNTER_FREQUENCY     CONFIG_COUNTER_FREQUENCY
-#endif
-
 /* Serial setup */
 #define CONFIG_SYS_BAUDRATE_TABLE \
        { 4800, 9600, 19200, 38400, 57600, 115200 }
index e5e700d..8eb44b1 100644 (file)
 
 #define CONFIG_SYS_INIT_SP_ADDR                CONFIG_SYS_TEXT_BASE
 
-/* Generic Timer Definitions - setup in EL3. Setup by ATF for other cases */
-#if !defined(COUNTER_FREQUENCY)
-# define COUNTER_FREQUENCY             100000000
-#endif
-
 /* Serial setup */
 #define CONFIG_SYS_BAUDRATE_TABLE \
        { 4800, 9600, 19200, 38400, 57600, 115200 }