tools/power/x86/intel-speed-select: Hide invalid TRL level
authorZhang Rui <rui.zhang@intel.com>
Thu, 18 Aug 2022 13:21:46 +0000 (21:21 +0800)
committerSrinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
Wed, 22 Mar 2023 20:36:55 +0000 (13:36 -0700)
TRL levels with Zero ratio values is meaningless.
Prevent these TRL levels from being displayed.

Signed-off-by: Zhang Rui <rui.zhang@intel.com>
Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
tools/power/x86/intel-speed-select/isst-display.c

index 1723e88..d8b789b 100644 (file)
@@ -505,6 +505,9 @@ void isst_ctdp_display_information(struct isst_id *id, FILE *outf, int tdp_level
                }
 
                for (k = 0; k < trl_max_levels; k++) {
+                       if (!ctdp_level->trl_ratios[k][0])
+                               continue;
+
                        snprintf(header, sizeof(header), "turbo-ratio-limits-%s", isst_get_trl_level_name(k));
                        format_and_print(outf, level + 2, header, NULL);