RADV_PERFTEST_OUT_OF_ORDER = 0x8,
RADV_PERFTEST_DCC_MSAA = 0x10,
RADV_PERFTEST_BO_LIST = 0x20,
+ RADV_PERFTEST_SHADER_BALLOT = 0x40,
};
bool
(device->rad_info.chip_class >= GFX8 &&
device->rad_info.me_fw_feature >= 41);
+ device->use_shader_ballot = device->instance->perftest_flags & RADV_PERFTEST_SHADER_BALLOT;
+
radv_physical_device_init_mem_types(device);
radv_fill_device_extension_table(device, &device->supported_extensions);
{"localbos", RADV_PERFTEST_LOCAL_BOS},
{"dccmsaa", RADV_PERFTEST_DCC_MSAA},
{"bolist", RADV_PERFTEST_BO_LIST},
+ {"shader_ballot", RADV_PERFTEST_SHADER_BALLOT},
{NULL, 0}
};
Extension('VK_AMD_gpu_shader_half_float', 1, 'device->rad_info.chip_class >= GFX8 && HAVE_LLVM >= 0x0800'),
Extension('VK_AMD_gpu_shader_int16', 1, 'device->rad_info.chip_class >= GFX8'),
Extension('VK_AMD_rasterization_order', 1, 'device->has_out_of_order_rast'),
+ Extension('VK_AMD_shader_ballot', 1, 'device->use_shader_ballot'),
Extension('VK_AMD_shader_core_properties', 1, True),
Extension('VK_AMD_shader_info', 1, True),
Extension('VK_AMD_shader_trinary_minmax', 1, True),
/* Whether LOAD_CONTEXT_REG packets are supported. */
bool has_load_ctx_reg_pkt;
+ /* Whether to enable the AMD_shader_ballot extension */
+ bool use_shader_ballot;
+
/* This is the drivers on-disk cache used as a fallback as opposed to
* the pipeline cache defined by apps.
*/
.lower_ubo_ssbo_access_to_offsets = true,
.caps = {
.amd_gcn_shader = true,
- .amd_shader_ballot = false,
+ .amd_shader_ballot = device->instance->perftest_flags & RADV_PERFTEST_SHADER_BALLOT,
.amd_trinary_minmax = true,
.derivative_group = true,
.descriptor_array_dynamic_indexing = true,